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<title>user/sven/linux.git/Documentation/devicetree/bindings/fuse, branch v4.7.2</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.7.2</id>
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<updated>2015-05-04T11:25:19Z</updated>
<entry>
<title>ARM: tegra: Use lower-case hexadecimal digits</title>
<updated>2015-05-04T11:25:19Z</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2015-04-29T11:53:21Z</published>
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<id>urn:sha1:5431b0fdadfec7aa61c916d6978544727a00b5fe</id>
<content type='text'>
For consistency with other device tree content, use lower-case
hexadecimal digits in register region specifications.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Documentation: DT bindings: add more Tegra chip compatible strings</title>
<updated>2015-02-04T02:37:31Z</updated>
<author>
<name>Paul Walmsley</name>
<email>paul@pwsan.com</email>
</author>
<published>2015-01-30T22:11:04Z</published>
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<id>urn:sha1:193c9d23a0f0b8ae0c2aeb517c953ba8aee4ceb9</id>
<content type='text'>
Align compatible strings for several IP blocks present on Tegra chips
with the latest doctrine from the DT maintainers:

http://marc.info/?l=devicetree&amp;m=142255654213019&amp;w=2

The primary objective here is to avoid checkpatch warnings, per:

http://marc.info/?l=linux-tegra&amp;m=142201349727836&amp;w=2

DT binding text files have been updated for the following IP blocks:

- PCIe
- SOR
- SoC timers
- AHB "gizmo"
- APB_MISC
- pinmux control
- UART
- PWM
- I2C
- SPI
- RTC
- PMC
- eFuse
- AHCI
- HDA
- XUSB_PADCTRL
- SDHCI
- SOC_THERM
- AHUB
- I2S
- EHCI
- USB PHY

N.B. The nvidia,tegra20-timer compatible string is removed from the
nvidia,tegra30-timer.txt documentation file because it's already
mentioned in the nvidia,tegra20-timer.txt documentation file.

This second version takes into account the following requests from
Rob Herring &lt;robherring2@gmail.com&gt;:

- Per-IP block patches have been combined into a single patch

- Explicit documentation about which compatible strings are actually
  matched by the driver has been removed.  In its place is implicit
  documentation that loosely follows Rob's prescribed format:

  "Must contain '"nvidia,&lt;chip&gt;-pcie", "nvidia,tegra20-pcie"' where
   &lt;chip&gt; is tegra30, tegra132, ..." [...]  "You should attempt to
   document known values of &lt;chip&gt; if you use it"

Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Alexandre Courbot &lt;gnurou@gmail.com&gt;
Cc: Dylan Reid &lt;dgreid@chromium.org&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Hans de Goede &lt;hdegoede@redhat.com&gt;
Cc: Ian Campbell &lt;ijc+devicetree@hellion.org.uk&gt;
Cc: Jingchang Lu &lt;jingchang.lu@freescale.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: Kumar Gala &lt;galak@codeaurora.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Cc: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
Cc: Paul Walmsley &lt;pwalmsley@nvidia.com&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Cc: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Cc: Sean Paul &lt;seanpaul@chromium.org&gt;
Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Takashi Iwai &lt;tiwai@suse.de&gt;
Cc: Tejun Heo &lt;tj@kernel.org&gt;
Cc: "Terje Bergström" &lt;tbergstrom@nvidia.com&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Tuomas Tynkkynen &lt;ttynkkynen@nvidia.com&gt;
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Cc: dri-devel@lists.freedesktop.org
Cc: linux-i2c@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-pwm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Acked-by: Eduardo Valentin &lt;edubezval@gmail.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>soc/tegra: Add efuse and apbmisc bindings</title>
<updated>2014-07-17T12:36:10Z</updated>
<author>
<name>Peter De Schrijver</name>
<email>pdeschrijver@nvidia.com</email>
</author>
<published>2014-06-12T15:36:38Z</published>
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<id>urn:sha1:155dfc7b543345ed45521900bbd32c0db4ea266e</id>
<content type='text'>
Add efuse and apbmisc bindings for Tegra20, Tegra30, Tegra114 and
Tegra124.

Signed-off-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
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