<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/arch/arc/kernel/Makefile, branch v4.12</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.12</id>
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<updated>2016-11-30T19:54:25Z</updated>
<entry>
<title>clocksource: import ARC timer driver</title>
<updated>2016-11-30T19:54:25Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2016-10-31T20:46:38Z</published>
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<id>urn:sha1:c4c9a040ecb7297e011e579f5a9cc280e42d725f</id>
<content type='text'>
This adds support for

 - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP
   from @CNT to @LIMIT, before optionally triggering an interrupt.
   These are programmed using ARC auxiliary register interface.
   These are present in all ARC cores (ARC700 and ARC HS38)
   TIMER0 serves as clockevent for all ARC linux builds.
   TIMER1 is used for clocksource in arc700 builds.

 - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in
   ARC HS38 cores. These are independnet IP blocks with different
   programming model respectively.

Link: http://lkml.kernel.org/r/20161111231132.GA4186@mai
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: RIP arc_{get|set}_core_freq() clk API</title>
<updated>2016-05-09T04:02:31Z</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2016-02-01T14:30:17Z</published>
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<id>urn:sha1:6e9318d1be83714e004a0ac795a936df4d2bed3e</id>
<content type='text'>
There are no more users of this - so RIP!

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
[vgupta: update changelog]
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Add PCI support</title>
<updated>2016-03-10T20:44:13Z</updated>
<author>
<name>Joao Pinto</name>
<email>Joao.Pinto@synopsys.com</email>
</author>
<published>2016-03-10T20:44:13Z</published>
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<id>urn:sha1:c1678ffcdea25afe4fbbebfab13d65a7db5458fb</id>
<content type='text'>
Add PCI support to ARC and update drivers/pci Makefile enabling the ARC
arch to use the generic PCI setup functions.

[bhelgaas: fold in Joao's pci-dma-compat.h &amp; pci-bridge.h build fix (I
should have caught this myself, sorry]
Signed-off-by: Joao Pinto &lt;jpinto@synopsys.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;</content>
</entry>
<entry>
<title>ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al</title>
<updated>2015-06-22T08:36:56Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-09-10T13:35:38Z</published>
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<id>urn:sha1:82fea5a1bbbe8c3b56d5f3efbf8880c7b25b1758</id>
<content type='text'>
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: Support for ARCv2 ISA and HS38x cores</title>
<updated>2015-06-22T08:36:55Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-05-13T13:00:41Z</published>
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<id>urn:sha1:1f6ccfff6314672743ad7252160654709e997a2a</id>
<content type='text'>
The notable features are:
    - SMP configurations of upto 4 cores with coherency
    - Optional L2 Cache and IO-Coherency
    - Revised Interrupt Architecture (multiple priorites, reg banks,
        auto stack switch, auto regfile save/restore)
    - MMUv4 (PIPT dcache, Huge Pages)
    - Instructions for
	* 64bit load/store: LDD, STD
	* Hardware assisted divide/remainder: DIV, REM
	* Function prologue/epilogue: ENTER_S, LEAVE_S
	* IRQ enable/disable: CLRI, SETI
	* pop count: FFS, FLS
	* SETcc, BMSKN, XBFU...

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: intc: split into ARCompact ISA specific, common bits</title>
<updated>2015-06-19T12:39:40Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-03-05T13:43:56Z</published>
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<id>urn:sha1:5793e273a134331d05ed904e5be3b31ccfca54c1</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: entry.S: split into ARCompact ISA specific, common bits</title>
<updated>2015-06-19T12:39:38Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-02-21T09:39:32Z</published>
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<id>urn:sha1:6d1a20b1d237db29878ae54142e39c87a36d0e95</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: rename kconfig option for unaligned emulation</title>
<updated>2014-10-13T09:16:15Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-09-08T05:48:15Z</published>
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<id>urn:sha1:1736a56f3d1d5765fa8953d39a900a494d7e415c</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Add perf support for ARC700 cores</title>
<updated>2013-11-12T04:15:38Z</updated>
<author>
<name>Mischa Jonker</name>
<email>mjonker@synopsys.com</email>
</author>
<published>2013-11-07T13:55:11Z</published>
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<id>urn:sha1:0dd450fe13da4aeacc69916ecfe39d3d0b531900</id>
<content type='text'>
This adds basic perf support for ARC700 cores. Most PERF_COUNT_HW* events
are supported now.

Signed-off-by: Mischa Jonker &lt;mjonker@synopsys.com&gt;
Acked-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Hostlink Pseudo-Driver for Metaware Debugger</title>
<updated>2013-02-15T17:46:10Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:25Z</published>
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<id>urn:sha1:cbe056f76a386708f3807b274322f78269aee0f6</id>
<content type='text'>
This allows ARC Target to do I/O to host in absence of any peripherals
whatsoever, assisted by Metaware Hostlink facility.

Further we have a FUSE based filesystem which makes us mount/access host
filesystem on target and do fops.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
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