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<title>user/sven/linux.git/arch/arc/kernel/devtree.c, branch v4.20</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.20</id>
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<updated>2017-09-01T18:26:28Z</updated>
<entry>
<title>ARC: [plat-hsdk] initial port for HSDK board</title>
<updated>2017-09-01T18:26:28Z</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2017-08-15T18:13:55Z</published>
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<id>urn:sha1:a518d63777a4e94e4b2dd86501604ec49ffe86b2</id>
<content type='text'>
This initial port adds support of ARC HS Development Kit board with some
basic features such serial port, USB, SD/MMC and Ethernet.

Essentially we run Linux kernel on all 4 cores (i.e. utilize SMP) and
heavily use IO Coherency for speeding-up DMA-aware peripherals.

Note as opposed to other ARC boards we link Linux kernel to
0x9000_0000 intentionally because cores 1 and 3 configured with DCCM
situated at our more usual link base 0x8000_0000. We still can use
memory region starting at 0x8000_0000 as we reallocate DCCM in our
platform code.

Note that PAE remapping for DMA clients does not work due to an RTL bug,
so CREG_PAE register must be programmed to all zeroes, otherwise it will
cause problems with DMA to/from peripherals even if PAE40 is not used.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Signed-off-by: Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: [plat-eznps] set default baud for early console</title>
<updated>2016-11-08T17:39:37Z</updated>
<author>
<name>Noam Camus</name>
<email>noamca@mellanox.com</email>
</author>
<published>2016-11-08T13:20:59Z</published>
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<id>urn:sha1:19dbc76228899be555b84a09fd3a364c2ce86bbb</id>
<content type='text'>
For CONFIG_SERIAL_EARLYCON we need 800MHz for NPS SoC
The early console driver uses BASE_BAUD and not using dtb.

The default of 50MHz is NOT good for NPS SoC.

Signed-off-by: Noam Camus &lt;noamca@mellanox.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: RIP arc_{get|set}_core_freq() clk API</title>
<updated>2016-05-09T04:02:31Z</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2016-02-01T14:30:17Z</published>
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<id>urn:sha1:6e9318d1be83714e004a0ac795a936df4d2bed3e</id>
<content type='text'>
There are no more users of this - so RIP!

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
[vgupta: update changelog]
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: use fixed frequencies in arc_set_early_base_baud()</title>
<updated>2016-05-09T04:02:30Z</updated>
<author>
<name>Alexey Brodkin</name>
<email>abrodkin@synopsys.com</email>
</author>
<published>2016-02-01T13:31:14Z</published>
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<id>urn:sha1:0e6e9b648d802fe6641fe543b6dc4828baded159</id>
<content type='text'>
UARTs usually have fixed clock so we're switching to use of
constant values instead of something derived from core clock
frequency.

Among other things this will allow us to get rid of
arc_{get|set}_core_freq() and switch to generic clock
framework later on.

Acked-by: Christian Ruppert &lt;christian.ruppert@alitech.com&gt;
Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores</title>
<updated>2015-06-25T00:30:20Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-03-09T09:03:40Z</published>
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<id>urn:sha1:5fa2daaa8d8223d06fcdba171a7a668dc8e8b179</id>
<content type='text'>
Cc: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: [axs101] support early 8250 uart</title>
<updated>2015-06-19T12:39:30Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-02-02T13:53:21Z</published>
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<id>urn:sha1:8d0d56ba24d8d0b04bc9d9a7fbd1796d8966159f</id>
<content type='text'>
Earlycon calculates UART clock as "BASE_BAUD * 16". In case of ARC
"BASE_BAUD" is calculated dynamically in runtime, basically it is an
alias to arc_early_base_baud(), which in turn just does
"arc_base_baud/16".

8250 UART on AXS/SDP board uses 33.3MHz clock source which is set in
"arc_base_baud" with this change.

Additional compatibility string "snps,arc-sdp" is introduced as well
because there're different flavours of AXS boards but they all share the
same motherboard and so it's possible to re-use the same code for
motherbord even if CPU daughterboard changes.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Fix earlycon build breakage</title>
<updated>2015-02-04T05:08:15Z</updated>
<author>
<name>Peter Hurley</name>
<email>peter@hurleysoftware.com</email>
</author>
<published>2015-02-04T01:08:52Z</published>
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<id>urn:sha1:091f56be10efe8ac7c09d6368d885f41fa7eb809</id>
<content type='text'>
Commit ffb7fcd66f14 ("ARC: Dynamically determine BASE_BAUD from DeviceTree")
breaks arc:defconfig build:

       drivers/built-in.o: In function `of_setup_earlycon':
       (.init.text+0xb3e): undefined reference to `arc_early_base_baud'
       drivers/built-in.o: In function `setup_earlycon':
       (.init.text+0xcd0): undefined reference to `arc_early_base_baud'
       make: *** [vmlinux] Error 1

BASE_BAUD is only required for earlycon, which should depend on
CONFIG_SERIAL_EARLYCON.

Reported-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Tested-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Dynamically determine BASE_BAUD from DeviceTree</title>
<updated>2015-02-02T11:38:37Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-10-28T09:34:05Z</published>
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<id>urn:sha1:ffb7fcd66f14bc716b9fdf559e71909131fef39b</id>
<content type='text'>
8250 earlycon is broken on multi-platform ARC because the UART clk
value (BASE_BAUD) is fixed at build time.

Instead, determine the appropriate UART clk at runtime; parse the
devicetree early for platforms requiring alternate UART clk values
(currently only the TB10X platform).

Cc: Jiri Slaby &lt;jslaby@suse.cz&gt;
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Rob Herring &lt;robh@kernel.org&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: fix build warning in devtree</title>
<updated>2014-06-23T06:20:26Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-06-23T06:12:44Z</published>
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<id>urn:sha1:760ecbc7d0e822d0e2ad2daeb9144bdd295637b5</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>of/fdt: update of_get_flat_dt_prop in prep for libfdt</title>
<updated>2014-04-30T05:59:15Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2014-04-02T04:49:03Z</published>
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<id>urn:sha1:9d0c4dfedd96ee54fc075b16d02f82499c8cc3a6</id>
<content type='text'>
Make of_get_flat_dt_prop arguments compatible with libfdt fdt_getprop
call in preparation to convert FDT code to use libfdt. Make the return
value const and the property length ptr type an int.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Tested-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Tested-by: Stephen Chivers &lt;schivers@csc.com&gt;
</content>
</entry>
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