user/sven/linux.git/arch/arc/kernel/setup.c, branch v6.1.149

ARCv2: boot log: detect newer/upconing HS3x/HS4x releases

2020-06-16T19:56:37Z

Signed-off-by: Vineet Gupta

ARC: Fix ICCM & DCCM runtime size checks

2020-04-12T23:17:00Z

As of today the ICCM and DCCM size checks are incorrectly using mismatched units (KiB checked against bytes). The CONFIG_ARC_DCCM_SZ and CONFIG_ARC_ICCM_SZ are in KiB, but the size calculated in runtime and stored in cpu->dccm.sz and cpu->iccm.sz is in bytes. Fix that. Reported-by: Paul Greco Signed-off-by: Eugeniy Paltsev Signed-off-by: Vineet Gupta

ARC: allow userspace DSP applications to use AGU extensions

2020-03-16T17:30:49Z

To be able to run DSP-enabled userspace applications with AGU (address generation unit) extensions we additionally need to save and restore following registers at context switch: * AGU_AP* * AGU_OS* * AGU_MOD* Reviewed-by: Vineet Gupta Signed-off-by: Eugeniy Paltsev Signed-off-by: Vineet Gupta

ARC: handle DSP presence in HW

2020-03-16T17:23:44Z

When DSP extensions are present, some of the regular integer instructions such as DIV, MACD etc are executed in the DSP unit with semantics alterable by flags in DSP_CTRL aux register. This register is writable by userspace and thus can potentially affect corresponding instructions in kernel code, intentionally or otherwise. So safegaurd kernel by effectively disabling DSP_CTRL upon bootup and every entry to kernel. Do note that for this config we simply zero out the DSP_CTRL reg assuming userspace doesn't really care about DSP. The next patch caters to the DSP aware userspace where this reg is saved/restored upon kernel entry/exit. Reviewed-by: Vineet Gupta Signed-off-by: Eugeniy Paltsev Signed-off-by: Vineet Gupta

ARC: add helpers to sanitize config options

2020-03-16T17:23:25Z

We'll use this macro in coming patches extensively. Reviewed-by: Vineet Gupta Signed-off-by: Eugeniy Paltsev Signed-off-by: Vineet Gupta

ARC: Replace by

2020-02-12T19:09:47Z

The ARC platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include instead of . Signed-off-by: Geert Uytterhoeven Reviewed-by: Stephen Boyd Signed-off-by: Vineet Gupta

arch/arc/setup: Drop dummy_con initialization

2020-01-14T14:29:15Z

con_init in tty/vt.c will now set conswitchp to dummy_con if it's unset. Drop it from arch setup code. Signed-off-by: Arvind Sankar Link: https://lore.kernel.org/r/20191218214506.49252-5-nivedita@alum.mit.edu Signed-off-by: Greg Kroah-Hartman

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19T15:09:55Z

Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Enrico Weigelt Reviewed-by: Kate Stewart Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman

ARC: unaligned: relax the check for gcc supporting -mno-unaligned-access

2019-03-05T17:16:33Z

Without bleeding edge gcc, kernel builds were tripping everywhere. So current gcc will generate unaligned code despite !CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS but that is something we have to live with. Signed-off-by: Vineet Gupta

ARC: boot log: cut down on verbosity

2019-02-25T23:12:23Z

The syscall ABI has long been fixed, so no need to call that out now. Also, there's no need to print really fine details such as norm, barrel-shifter etc. Those are given in a Linux enabled hardware config. So now we print just 1 line for all optional "instruction" related hardware features | | ISA Extn : atomic ll64 unalign mpy[opt 9] div_rem vs. 2 before | |ISA Extn : atomic ll64 unalign | : mpy[opt 9] div_rem norm barrel-shift swap minmax swape Signed-off-by: Vineet Gupta