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<title>user/sven/linux.git/arch/arc/kernel, branch v4.10.3</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.10.3</id>
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<updated>2017-02-07T18:02:01Z</updated>
<entry>
<title>ARC: [arcompact] brown paper bag bug in unaligned access delay slot fixup</title>
<updated>2017-02-07T18:02:01Z</updated>
<author>
<name>Vineet Gupta</name>
<email>Vineet.Gupta1@synopsys.com</email>
</author>
<published>2017-02-07T17:44:58Z</published>
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<id>urn:sha1:a524c218bc94c705886a0e0fedeee45d1931da32</id>
<content type='text'>
Reported-by: Jo-Philipp Wich &lt;jo@mein.io&gt;
Fixes: 9aed02feae57bf7 ("ARC: [arcompact] handle unaligned access delay slot")
Cc: linux-kernel@vger.kernel.org
Cc: linux-snps-arc@lists.infradead.org
Cc: stable@vger.kernel.org
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>ARC: [arcompact] handle unaligned access delay slot corner case</title>
<updated>2017-01-27T18:54:20Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2017-01-27T18:45:27Z</published>
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<id>urn:sha1:9aed02feae57bf7a40cb04ea0e3017cb7a998db4</id>
<content type='text'>
After emulating an unaligned access in delay slot of a branch, we
pretend as the delay slot never happened - so return back to actual
branch target (or next PC if branch was not taken).

Curently we did this by handling STATUS32.DE, we also need to clear the
BTA.T bit, which is disregarded when returning from original misaligned
exception, but could cause weirdness if it took the interrupt return
path (in case interrupt was acive too)

One ARC700 customer ran into this when enabling unaligned access fixup
for kernel mode accesses as well

Cc: stable@vger.kernel.org
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: smp-boot: wake_flag polling by non-Masters needs to be uncached</title>
<updated>2017-01-24T22:25:19Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2016-06-21T08:54:33Z</published>
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<id>urn:sha1:78f824d4312a8944f5340c6b161bba3bf2c81096</id>
<content type='text'>
This is needed on HS38 cores, for setting up IO-Coherency aperture properly

The polling could perturb the caches and coherecy fabric which could be
wrong in the small window when Master is setting up IOC aperture etc
in arc_cache_init()

We do it only for ARCv2 based builds to not affect EZChip ARCompact
based platform.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: smp-boot: Decouple Non masters waiting API from jump to entry point</title>
<updated>2017-01-24T19:12:28Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2017-01-12T22:30:29Z</published>
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<id>urn:sha1:bf02454a741b58682a82c314a9a46bed930ed2f7</id>
<content type='text'>
For run-on-reset SMP configs, non master cores call a routine which
waits until Master gives it a "go" signal (currently using a shared
mem flag). The same routine then jumps off the well known entry point of
all non Master cores i.e. @first_lines_of_secondary

This patch moves out the last part into one single place in early boot
code.

This is better in terms of absraction (the wait API only waits) and
returns, leaving out the "jump off to" part.

In actual implementation this requires some restructuring of the early
boot code as well as Master now jumps to BSS setup explicitly,
vs. falling thru into it before.

Technically this patch doesn't cause any functional change, it just
moves the ugly #ifdef'ry from assembly code to "C"

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: MCIP: update the BCR per current changes</title>
<updated>2017-01-24T19:05:59Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2017-01-20T01:05:00Z</published>
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<id>urn:sha1:517e7610d2ce04d1b8d8b6c6d1a36dcce5cac6ab</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: MCIP: Deprecate setting of affinity in Device Tree</title>
<updated>2017-01-24T18:22:48Z</updated>
<author>
<name>Yuriy Kolerov</name>
<email>yuriy.kolerov@synopsys.com</email>
</author>
<published>2016-12-28T08:46:26Z</published>
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<id>urn:sha1:92fdb527eecff7e5eb945a3fbf4743110f5c1171</id>
<content type='text'>
Ignore value of interrupt distribution mode for common interrupts in
IDU since setting of affinity using value from Device Tree is deprecated
in ARC. Originally it is done in idu_irq_xlate() function and it is
semantically wrong and does not guaranty that an affinity value will be
set properly. idu_irq_enable() function is better place for
initialization of common interrupts.

By default send all common interrupts to all available online CPUs.
The affinity of common interrupts in IDU must be set manually since
in some cases the kernel will not call irq_set_affinity() by itself:

  1. When the kernel is not configured with support of SMP.
  2. When the kernel is configured with support of SMP but upper
     interrupt controllers does not support setting of the affinity
     and cannot propagate it to IDU.

Signed-off-by: Yuriy Kolerov &lt;yuriy.kolerov@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: module: Fix !CONFIG_ARC_DW2_UNWIND builds</title>
<updated>2017-01-18T19:17:44Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2017-01-16T18:48:09Z</published>
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<id>urn:sha1:eb1357d942e5d96de6b4c20a8ffa55acf96233a2</id>
<content type='text'>
commit d65283f7b695b5 added mod-&gt;arch.secstr under
CONFIG_ARC_DW2_UNWIND, but used it unconditionally which broke builds
when the option was disabled. Fix that by adjusting the #ifdef guard.

And while at it add a missing guard (for unwinder) in module.c as well

Reported-by: Waldemar Brodkorb &lt;wbx@openadk.org&gt;
Cc: stable@vger.kernel.org    #4.9
Fixes: d65283f7b695b5 ("ARC: module: elide loop to save reference to .eh_frame")
Tested-by: Anton Kolesov &lt;akolesov@synopsys.com&gt;
Reviewed-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
[abrodkin: provided fixlet to Kconfig per failure in allnoconfig build]
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: IRQ: Call entry/exit functions for chained handlers in MCIP</title>
<updated>2017-01-05T01:12:11Z</updated>
<author>
<name>Yuriy Kolerov</name>
<email>yuriy.kolerov@synopsys.com</email>
</author>
<published>2016-12-28T08:46:25Z</published>
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<id>urn:sha1:e51d5d02f688c45b6f644f472f0c80fdfa73f0cb</id>
<content type='text'>
It is necessary to call entry/exit functions for parent interrupt
controllers for proper masking/unmasking of interrupt lines.

Signed-off-by: Yuriy Kolerov &lt;yuriy.kolerov@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: IRQ: Use hwirq instead of virq in mask/unmask</title>
<updated>2017-01-05T01:12:10Z</updated>
<author>
<name>Yuriy Kolerov</name>
<email>yuriy.kolerov@synopsys.com</email>
</author>
<published>2016-12-28T08:46:24Z</published>
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<id>urn:sha1:2163266c2704aa44211b6b61924a0fa570fe0d4b</id>
<content type='text'>
It is necessary to use hwirq instead of virq when you communicate
with an interrupt controller since there is no guaranty that virq
numbers match hwirq numbers.

Signed-off-by: Yuriy Kolerov &lt;yuriy.kolerov@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: intc: default all interrupts to priority 1</title>
<updated>2016-12-14T17:23:46Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2016-09-30T23:13:28Z</published>
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<id>urn:sha1:107177b14d8179f864315fc4daed9da777ed30c2</id>
<content type='text'>
ARC HS Cores support configurable multiple interrupt priorities of upto
16 levels. In commit dec2b2849cfcc ("ARCv2: intc: Allow interruption by
lowest priority interrupt") we switched to 15 which seems a bit
excessive given that there would be rare hardware implementing so many
preemption levels AND running Linux. It would seem that 2 levels will be
more common so switch to 1 as the default priority level. This will be
the "lower" priority level saving 0 for implementing NMI style support.

This scheme also works in systems with more than 2 prioity levels as
well.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
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