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<title>user/sven/linux.git/arch/arc/lib, branch v4.20</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.20</id>
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<updated>2016-09-30T21:48:22Z</updated>
<entry>
<title>ARC: dw2 unwind: enable cfi pseudo ops in string lib</title>
<updated>2016-09-30T21:48:22Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2016-09-19T23:42:25Z</published>
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<id>urn:sha1:86effd0dc675c36caed7b954d7f4f63b77c353b5</id>
<content type='text'>
This uses a new set of annoations viz. ENTRY_CFI/END_CFI to enabel cfi
ops generation.

Note that we didn't change the normal ENTRY/EXIT as we don't actually
want unwind info in the trap/exception/interrutp handlers which use
these, as unwinder then gets confused (it keeps recursing vs. stopping).
Semantically these are leaf routines and unwinding should stop when it
hits those routines.

Before
------

    28.52%     1.19%          9929  hackbench  libuClibc-1.0.17.so   [.] __write_nocancel
            |
            ---__write_nocancel
               |--8.95%--EV_Trap
               |           --8.25%--sys_write
               |                     |--3.93%--sock_write_iter
     ...
               |--2.62%--memset   &lt;==== [LEAF entry as no unwind info]
                         ^^^^^^

After
-----

    29.46%     1.24%         13622  hackbench  libuClibc-1.0.17.so   [.] __write_nocancel
            |
            ---__write_nocancel
               |--9.31%--EV_Trap
               |           --8.62%--sys_write
               |                     |--4.17%--sock_write_iter
     ...
               |--6.19%--sys_write
               |           --6.19%--sock_write_iter
               |                     unix_stream_sendmsg
               |                     |--1.62%--sock_alloc_send_pskb
               |                     |--0.89%--sock_def_readable
               |                     |--0.88%--_raw_spin_unlock_irqrestore
               |                     |--0.69%--memset
               |                     |         ^^^^^^     &lt;==== [now in proper callframe]
               |                     |
               |                      --0.52%--skb_copy_datagram_from_iter

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: lib: memcpy: use local symbols</title>
<updated>2015-11-03T12:03:00Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-10-29T14:06:03Z</published>
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<id>urn:sha1:ac506b7f2233b35f17172304255e08cabc072aad</id>
<content type='text'>
Otherwise perf profiles don't charge tme to memcpy

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: lib: memset: Don't assume 64-bit load/stores</title>
<updated>2015-07-20T14:44:37Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-07-20T09:05:03Z</published>
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<id>urn:sha1:262137bca7cfbe690f8e904822b68f720998324a</id>
<content type='text'>
There are configurations which may not have LDD/STD

Signed-off-by: Claudiu Zissulescu &lt;claziss@synopsys.com&gt;
Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: lib: memcpy: Missing PREFETCHW</title>
<updated>2015-07-20T14:27:35Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2015-07-20T14:19:17Z</published>
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<id>urn:sha1:21481f2cfef9a79d3676916ef9424b1a7794776c</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: Adhere to Zero Delay loop restriction</title>
<updated>2015-06-22T08:36:56Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-10-07T12:40:08Z</published>
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<id>urn:sha1:8922bc3058abbe5deaf887147e26531750ce7513</id>
<content type='text'>
Branch insn can't be scheduled as last insn of Zero Overhead loop

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARCv2: optimised string/mem lib routines</title>
<updated>2015-06-22T08:36:56Z</updated>
<author>
<name>Claudiu Zissulescu</name>
<email>claziss@synopsys.com</email>
</author>
<published>2014-11-21T08:09:25Z</published>
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<id>urn:sha1:1f7e3dc0baaa41217dc06d3370e1efd1aecbc1f0</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: switch to generic ENTRY/END assembler annotations</title>
<updated>2014-03-26T09:01:28Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2014-02-07T08:17:43Z</published>
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<id>urn:sha1:ec7ac6afd07b2d958aab9dfc0a686300b856922a</id>
<content type='text'>
With commit 9df62f054406 "arch: use ASM_NL instead of ';'" the generic
macros can handle the arch specific newline quirk. Hence we can get rid
of ARC asm macros and use the "C" style macros.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: [lib] strchr breakage in Big-endian configuration</title>
<updated>2013-08-24T18:24:53Z</updated>
<author>
<name>Joern Rennecke</name>
<email>joern.rennecke@embecosm.com</email>
</author>
<published>2013-08-24T06:33:06Z</published>
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<id>urn:sha1:b0f55f2a1a295c364be012e82dbab079a2454006</id>
<content type='text'>
For a search buffer, 2 byte aligned, strchr() was returning pointer
outside of buffer (buf - 1)

-------------&gt;8----------------
    // Input buffer (default 4 byte aigned)
    char *buffer = "1AA_";

    // actual search start (to mimick 2 byte alignment)
    char *current_line = &amp;(buffer[2]);

    // Character to search for
    char c = 'A';

    char *c_pos = strchr(current_line, c);

    printf("%s\n", c_pos) --&gt; 'AA_' as oppose to 'A_'
-------------&gt;8----------------

Reported-by: Anton Kolesov &lt;Anton.Kolesov@synopsys.com&gt;
Debugged-by: Anton Kolesov &lt;Anton.Kolesov@synopsys.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # [3.9 and 3.10]
Cc: Noam Camus &lt;noamc@ezchip.com&gt;
Signed-off-by: Joern Rennecke  &lt;joern.rennecke@embecosm.com&gt;
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>ARC: String library</title>
<updated>2013-02-11T14:30:35Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:18Z</published>
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<id>urn:sha1:5210d1e6889c8183ecad269e86e2d9c524015b5f</id>
<content type='text'>
Hand optimised asm code for ARC700 pipeline.
Originally written/optimized by Joern Rennecke

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Joern Rennecke &lt;joern.rennecke@embecosm.com&gt;
</content>
</entry>
<entry>
<title>ARC: Build system: Makefiles, Kconfig, Linker script</title>
<updated>2013-02-11T14:30:25Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:20Z</published>
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<id>urn:sha1:cfdbc2e16e65c1ec1c23057640607cee98d1a1bd</id>
<content type='text'>
Arnd in his review pointed out that arch Kconfig organisation has several
deficiencies:

* Build time entries for things which can be runtime extracted from DT
  (e.g. SDRAM size, core clk frequency..)
* Not multi-platform-image-build friendly (choice .. endchoice constructs)
* cpu variants support (750/770) is exclusive.

The first 2 have been fixed in subsequent patches.
Due to the nature of the 750 and 770, it is not possible to build for
both together, w/o special runtime glue code which would hurt
performance.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
</content>
</entry>
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