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<title>user/sven/linux.git/arch/arm/kernel/devtree.c, branch v3.16.1</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v3.16.1</id>
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<updated>2014-07-30T03:26:49Z</updated>
<entry>
<title>arm: Add devicetree fixup machine function</title>
<updated>2014-07-30T03:26:49Z</updated>
<author>
<name>Laura Abbott</name>
<email>lauraa@codeaurora.org</email>
</author>
<published>2014-07-15T17:03:36Z</published>
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<id>urn:sha1:5a12a597a8627b91fd9d94365853f9f69a4f399c</id>
<content type='text'>
Commit 1c2f87c22566cd057bc8cde10c37ae9da1a1bb76
(ARM: 8025/1: Get rid of meminfo) dropped the upper bound on
the number of memory banks that can be added as there was no
technical need in the kernel. It turns out though, some bootloaders
(specifically the arndale-octa exynos boards) may pass invalid memory
information and rely on the kernel to not parse this data. This is a
bug in the bootloader but we still need to work around this.
Work around this by introducing a dt_fixup function. This function
gets called before the flattened devicetree is scanned for memory
and the like. In this fixup function for exynos, limit the maximum
number of memory regions in the devicetree.

Signed-off-by: Laura Abbott &lt;lauraa@codeaurora.org&gt;
Tested-by: Andreas Färber &lt;afaerber@suse.de&gt;
[glikely: Added a comment and fixed up function name]
Signed-off-by: Grant Likely &lt;grant.likely@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next</title>
<updated>2014-06-05T22:57:04Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-06-05T22:57:04Z</published>
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<id>urn:sha1:eb3d3ec567e868c8a3bfbfdfc9465ffd52983d11</id>
<content type='text'>
Pull ARM updates from Russell King:

 - Major clean-up of the L2 cache support code.  The existing mess was
   becoming rather unmaintainable through all the additions that others
   have done over time.  This turns it into a much nicer structure, and
   implements a few performance improvements as well.

 - Clean up some of the CP15 control register tweaks for alignment
   support, moving some code and data into alignment.c

 - DMA properties for ARM, from Santosh and reviewed by DT people.  This
   adds DT properties to specify bus translations we can't discover
   automatically, and to indicate whether devices are coherent.

 - Hibernation support for ARM

 - Make ftrace work with read-only text in modules

 - add suspend support for PJ4B CPUs

 - rework interrupt masking for undefined instruction handling, which
   allows us to enable interrupts earlier in the handling of these
   exceptions.

 - support for big endian page tables

 - fix stacktrace support to exclude stacktrace functions from the
   trace, and add save_stack_trace_regs() implementation so that kprobes
   can record stack traces.

 - Add support for the Cortex-A17 CPU.

 - Remove last vestiges of ARM710 support.

 - Removal of ARM "meminfo" structure, finally converting us solely to
   memblock to handle the early memory initialisation.

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
  ARM: ensure C page table setup code follows assembly code (part II)
  ARM: ensure C page table setup code follows assembly code
  ARM: consolidate last remaining open-coded alignment trap enable
  ARM: remove global cr_no_alignment
  ARM: remove CPU_CP15 conditional from alignment.c
  ARM: remove unused adjust_cr() function
  ARM: move "noalign" command line option to alignment.c
  ARM: provide common method to clear bits in CPU control register
  ARM: 8025/1: Get rid of meminfo
  ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
  ARM: 8066/1: correction for ARM patch 8031/2
  ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
  ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
  ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
  ARM: 8047/1: rwsem: use asm-generic rwsem implementation
  ARM: l2c: trial at enabling some Cortex-A9 optimisations
  ARM: l2c: add warnings for stuff modifying aux_ctrl register values
  ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
  ARM: l2c: remove old .set_debug method
  ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
  ...
</content>
</entry>
<entry>
<title>ARM: 8025/1: Get rid of meminfo</title>
<updated>2014-06-01T00:17:12Z</updated>
<author>
<name>Laura Abbott</name>
<email>lauraa@codeaurora.org</email>
</author>
<published>2014-04-13T21:54:58Z</published>
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<id>urn:sha1:1c2f87c22566cd057bc8cde10c37ae9da1a1bb76</id>
<content type='text'>
memblock is now fully integrated into the kernel and is the prefered
method for tracking memory. Rather than reinvent the wheel with
meminfo, migrate to using memblock directly instead of meminfo as
an intermediate.

Acked-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Acked-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Acked-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Tested-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Tested-by: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Signed-off-by: Laura Abbott &lt;lauraa@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: align cpu_method_of_table naming</title>
<updated>2014-05-20T19:24:41Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2014-03-24T21:11:54Z</published>
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<id>urn:sha1:9a721c41113a50ccbe184d67a5e551feb99e36a9</id>
<content type='text'>
The cpu_method_of_table is the oddball of the various OF linker sections.
In preparation to have common linker section definitions, align the
cpu_method_of_table with the other definitions for the naming and ending
with a blank struct.

Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>of/fdt: move memreserve and dtb memory reservations into core</title>
<updated>2014-04-30T05:59:17Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2014-04-02T03:46:48Z</published>
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<id>urn:sha1:d1552ce449eb0a8d2f0bd6599da3a8a3d7f77a84</id>
<content type='text'>
Move the /memreserve/ processing and dtb memory reservations into
early_init_fdt_scan_reserved_mem. This converts arm, arm64, and powerpc
as they are the only users of early_init_fdt_scan_reserved_mem.

memblock_reserve is safe to call on the same region twice, so the
reservation check for the dtb in powerpc 32-bit reservations is safe to
remove.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Tested-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Tested-by: Stephen Chivers &lt;schivers@csc.com&gt;
</content>
</entry>
<entry>
<title>of/fdt: update of_get_flat_dt_prop in prep for libfdt</title>
<updated>2014-04-30T05:59:15Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2014-04-02T04:49:03Z</published>
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<id>urn:sha1:9d0c4dfedd96ee54fc075b16d02f82499c8cc3a6</id>
<content type='text'>
Make of_get_flat_dt_prop arguments compatible with libfdt fdt_getprop
call in preparation to convert FDT code to use libfdt. Make the return
value const and the property length ptr type an int.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Tested-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Tested-by: Stephen Chivers &lt;schivers@csc.com&gt;
</content>
</entry>
<entry>
<title>ARM: dt: use default early_init_dt_alloc_memory_arch</title>
<updated>2014-04-30T05:59:12Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2014-04-03T18:13:46Z</published>
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<id>urn:sha1:1f809b4b1221f35cd2995b5605c006a8903c340c</id>
<content type='text'>
Now that ARM is using memblock instead of bootmem, the default version
of early_init_dt_alloc_memory_arch can be used.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: linux-arm-kernel@lists.infradead.org
Tested-by: Grant Likely &lt;grant.likely@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: Introduce CPU_METHOD_OF_DECLARE() for cpu hotplug/smp</title>
<updated>2014-02-11T21:00:37Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2013-10-31T01:21:09Z</published>
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<id>urn:sha1:6c3ff8b11a16ec69199ab85b74a5fae6d9c59db7</id>
<content type='text'>
The goal of multi-platform kernels is to remove the need for mach
directories and machine descriptors. To further that goal,
introduce CPU_METHOD_OF_DECLARE() to allow cpu hotplug/smp
support to be separated from the machine descriptors.
Implementers should specify an enable-method property in their
cpus node and then implement a matching set of smp_ops in their
hotplug/smp code, wiring it up with the CPU_METHOD_OF_DECLARE()
macro. When the kernel is compiled we'll collect all the
enable-method smp_ops into one section for use at boot.

At boot time we'll look for an enable-method in each cpu node and
try to match that against all known CPU enable methods in the
kernel. If there are no enable-methods in the cpu nodes we
fallback to the cpus node and try to use any enable-method found
there. If that doesn't work we fall back to the old way of using
the machine descriptor.

Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: &lt;devicetree@vger.kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Kumar Gala &lt;galak@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>arch/arm/kernel/: use memblock apis for early memory allocations</title>
<updated>2014-01-22T00:19:47Z</updated>
<author>
<name>Santosh Shilimkar</name>
<email>santosh.shilimkar@ti.com</email>
</author>
<published>2014-01-21T23:50:47Z</published>
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<id>urn:sha1:9233d2be108f573caa21eb450411bf8fa68cadbb</id>
<content type='text'>
Switch to memblock interfaces for early memory allocator instead of
bootmem allocator.  No functional change in beahvior than what it is in
current code from bootmem users points of view.

Archs already converted to NO_BOOTMEM now directly use memblock
interfaces instead of bootmem wrappers build on top of memblock.  And
the archs which still uses bootmem, these new apis just fallback to
exiting bootmem APIs.

Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Cc: "Rafael J. Wysocki" &lt;rjw@sisk.pl&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Christoph Lameter &lt;cl@linux-foundation.org&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Johannes Weiner &lt;hannes@cmpxchg.org&gt;
Cc: KAMEZAWA Hiroyuki &lt;kamezawa.hiroyu@jp.fujitsu.com&gt;
Cc: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Cc: Michal Hocko &lt;mhocko@suse.cz&gt;
Cc: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Pavel Machek &lt;pavel@ucw.cz&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Tejun Heo &lt;tj@kernel.org&gt;
Cc: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: 7934/1: DT/kernel: fix arch_match_cpu_phys_id to avoid erroneous match</title>
<updated>2014-01-11T12:06:57Z</updated>
<author>
<name>Sudeep Holla</name>
<email>sudeep.holla@arm.com</email>
</author>
<published>2014-01-08T17:24:21Z</published>
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<id>urn:sha1:e44ef891e9e68b6ce7d3fd3bac73b7d5433050ae</id>
<content type='text'>
The MPIDR contains specific bitfields(MPIDR.Aff{2..0}) which uniquely
identify a CPU, in addition to some non-identifying information and
reserved bits. The ARM cpu binding defines the 'reg' property to only
contain the affinity bits, and any cpu nodes with other bits set in
their 'reg' entry are skipped.

As such it is not necessary to mask the phys_id with MPIDR_HWID_BITMASK,
and doing so could lead to matching erroneous CPU nodes in the device
tree. This patch removes the masking of the physical identifier.

Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
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