<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/arch/csky/include, branch v5.4.43</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.4.43</id>
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<updated>2020-04-23T08:36:38Z</updated>
<entry>
<title>csky: Fixup get wrong psr value from phyical reg</title>
<updated>2020-04-23T08:36:38Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2020-03-31T15:45:52Z</published>
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<id>urn:sha1:57615a8561f0b9fef57f18c2c51cb08f679307c8</id>
<content type='text'>
[ Upstream commit 9c0e343d7654a329d1f9b53d253cbf7fb6eff85d ]

We should get psr value from regs-&gt;psr in stack, not directly get
it from phyiscal register then save the vector number in
tsk-&gt;trap_no.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>csky: Fixup compile warning for three unimplemented syscalls</title>
<updated>2020-03-12T12:00:16Z</updated>
<author>
<name>Guo Ren</name>
<email>guoren@linux.alibaba.com</email>
</author>
<published>2020-02-02T06:11:11Z</published>
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<id>urn:sha1:479466726bf12290910df4bec6f4c106dbe42593</id>
<content type='text'>
[ Upstream commit 2305f60b76110cb3e8658a4ae85d1f7eb0c66a5b ]

Implement fstat64, fstatat64, clone3 syscalls to fixup
checksyscalls.sh compile warnings.

Signed-off-by: Guo Ren &lt;guoren@linux.alibaba.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'csky-for-linus-5.4-rc1' of git://github.com/c-sky/csky-linux</title>
<updated>2019-09-30T17:16:17Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-09-30T17:16:17Z</published>
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<id>urn:sha1:80b29b6b8cd7479a67f5e338195dbc121b30c879</id>
<content type='text'>
Pull csky updates from Guo Ren:
 "This round of csky subsystem just some fixups:

   - Fix mb() synchronization problem

   - Fix dma_alloc_coherent with PAGE_SO attribute

   - Fix cache_op failed when cross memory ZONEs

   - Optimize arch_sync_dma_for_cpu/device with dma_inv_range

   - Fix ioremap function losing

   - Fix arch_get_unmapped_area() implementation

   - Fix defer cache flush for 610

   - Support kernel non-aligned access

   - Fix 610 vipt cache flush mechanism

   - Fix add zero_fp fixup perf backtrace panic

   - Move static keyword to the front of declaration

   - Fix csky_pmu.max_period assignment

   - Use generic free_initrd_mem()

   - entry: Remove unneeded need_resched() loop"

* tag 'csky-for-linus-5.4-rc1' of git://github.com/c-sky/csky-linux:
  csky: Move static keyword to the front of declaration
  csky: entry: Remove unneeded need_resched() loop
  csky: Fixup csky_pmu.max_period assignment
  csky: Fixup add zero_fp fixup perf backtrace panic
  csky: Use generic free_initrd_mem()
  csky: Fixup 610 vipt cache flush mechanism
  csky: Support kernel non-aligned access
  csky: Fixup defer cache flush for 610
  csky: Fixup arch_get_unmapped_area() implementation
  csky: Fixup ioremap function losing
  csky: Optimize arch_sync_dma_for_cpu/device with dma_inv_range
  csky/dma: Fixup cache_op failed when cross memory ZONEs
  csky: Fixup dma_alloc_coherent with PAGE_SO attribute
  csky: Fixup mb() synchronization problem
</content>
</entry>
<entry>
<title>mm: treewide: clarify pgtable_page_{ctor,dtor}() naming</title>
<updated>2019-09-26T17:10:44Z</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2019-09-25T23:49:46Z</published>
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<id>urn:sha1:b4ed71f557e458257e0f71b11969954acb389240</id>
<content type='text'>
The naming of pgtable_page_{ctor,dtor}() seems to have confused a few
people, and until recently arm64 used these erroneously/pointlessly for
other levels of page table.

To make it incredibly clear that these only apply to the PTE level, and to
align with the naming of pgtable_pmd_page_{ctor,dtor}(), let's rename them
to pgtable_pte_page_{ctor,dtor}().

These changes were generated with the following shell script:

----
git grep -lw 'pgtable_page_.tor' | while read FILE; do
    sed -i '{s/pgtable_page_ctor/pgtable_pte_page_ctor/}' $FILE;
    sed -i '{s/pgtable_page_dtor/pgtable_pte_page_dtor/}' $FILE;
done
----

... with the documentation re-flowed to remain under 80 columns, and
whitespace fixed up in macros to keep backslashes aligned.

There should be no functional change as a result of this patch.

Link: http://lkml.kernel.org/r/20190722141133.3116-1-mark.rutland@arm.com
Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Reviewed-by: Mike Rapoport &lt;rppt@linux.ibm.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;	[m68k]
Cc: Anshuman Khandual &lt;anshuman.khandual@arm.com&gt;
Cc: Matthew Wilcox &lt;willy@infradead.org&gt;
Cc: Michal Hocko &lt;mhocko@suse.com&gt;
Cc: Yu Zhao &lt;yuzhao@google.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>mm: consolidate pgtable_cache_init() and pgd_cache_init()</title>
<updated>2019-09-24T22:54:09Z</updated>
<author>
<name>Mike Rapoport</name>
<email>rppt@linux.ibm.com</email>
</author>
<published>2019-09-23T22:35:31Z</published>
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<id>urn:sha1:782de70c42930baae55234f3df0dc90774924447</id>
<content type='text'>
Both pgtable_cache_init() and pgd_cache_init() are used to initialize kmem
cache for page table allocations on several architectures that do not use
PAGE_SIZE tables for one or more levels of the page table hierarchy.

Most architectures do not implement these functions and use __weak default
NOP implementation of pgd_cache_init().  Since there is no such default
for pgtable_cache_init(), its empty stub is duplicated among most
architectures.

Rename the definitions of pgd_cache_init() to pgtable_cache_init() and
drop empty stubs of pgtable_cache_init().

Link: http://lkml.kernel.org/r/1566457046-22637-1-git-send-email-rppt@linux.ibm.com
Signed-off-by: Mike Rapoport &lt;rppt@linux.ibm.com&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;		[arm64]
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;	[x86]
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Matthew Wilcox &lt;willy@infradead.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>mm: remove quicklist page table caches</title>
<updated>2019-09-24T22:54:09Z</updated>
<author>
<name>Nicholas Piggin</name>
<email>npiggin@gmail.com</email>
</author>
<published>2019-09-23T22:35:19Z</published>
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<id>urn:sha1:13224794cb0832caa403ad583d8605202cabc6bc</id>
<content type='text'>
Patch series "mm: remove quicklist page table caches".

A while ago Nicholas proposed to remove quicklist page table caches [1].

I've rebased his patch on the curren upstream and switched ia64 and sh to
use generic versions of PTE allocation.

[1] https://lore.kernel.org/linux-mm/20190711030339.20892-1-npiggin@gmail.com

This patch (of 3):

Remove page table allocator "quicklists".  These have been around for a
long time, but have not got much traction in the last decade and are only
used on ia64 and sh architectures.

The numbers in the initial commit look interesting but probably don't
apply anymore.  If anybody wants to resurrect this it's in the git
history, but it's unhelpful to have this code and divergent allocator
behaviour for minor archs.

Also it might be better to instead make more general improvements to page
allocator if this is still so slow.

Link: http://lkml.kernel.org/r/1565250728-21721-2-git-send-email-rppt@linux.ibm.com
Signed-off-by: Nicholas Piggin &lt;npiggin@gmail.com&gt;
Signed-off-by: Mike Rapoport &lt;rppt@linux.ibm.com&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>csky: add missing brackets in a macro for tlb.h</title>
<updated>2019-09-07T07:28:05Z</updated>
<author>
<name>Jason Gunthorpe</name>
<email>jgg@mellanox.com</email>
</author>
<published>2019-09-02T05:47:05Z</published>
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<id>urn:sha1:6bdf3b0aeead8edf91306dd60dcf676c257aad30</id>
<content type='text'>
As an earlier patch made the macro argument more complicated, compilation
now fails with:

 In file included from mm/madvise.c:30:
 mm/madvise.c: In function 'madvise_free_single_vma':
 arch/csky/include/asm/tlb.h:11:11: error:
     invalid type argument of '-&gt;' (have 'struct mmu_gather')

Link: https://lore.kernel.org/r/20190901193601.GB5208@mellanox.com
Fixes: 923bfc561e75 ("pagewalk: separate function pointers from iterator data")
Reported-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
</content>
</entry>
<entry>
<title>csky: Fixup ioremap function losing</title>
<updated>2019-08-15T11:21:28Z</updated>
<author>
<name>Guo Ren</name>
<email>ren_guo@c-sky.com</email>
</author>
<published>2019-08-15T08:24:56Z</published>
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<id>urn:sha1:5336c17928cc464845ff765ce45b368c22f848e0</id>
<content type='text'>
Implement the following apis to meet usage in different scenarios.

 - ioremap          (NonCache + StrongOrder)
 - ioremap_nocache  (NonCache + StrongOrder)
 - ioremap_wc       (NonCache + WeakOrder  )
 - ioremap_cache    (   Cache + WeakOrder  )

Also change flag VM_ALLOC to VM_IOREMAP in get_vm_area_caller.

Signed-off-by: Guo Ren &lt;ren_guo@c-sky.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Christoph Hellwig &lt;hch@infradead.org&gt;
</content>
</entry>
<entry>
<title>csky: Optimize arch_sync_dma_for_cpu/device with dma_inv_range</title>
<updated>2019-08-06T07:15:34Z</updated>
<author>
<name>Guo Ren</name>
<email>ren_guo@c-sky.com</email>
</author>
<published>2019-07-30T09:16:28Z</published>
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<id>urn:sha1:ae76f635d4e1cffa6870cc5472567ca9d6940a22</id>
<content type='text'>
DMA_FROM_DEVICE only need to read dma data of memory into CPU cache,
so there is no need to clear cache before. Also clear + inv for
DMA_FROM_DEVICE won't cause problem, because the memory range for dma
won't be touched by software during dma working.

Changes for V2:
 - Remove clr cache and ignore the DMA_TO_DEVICE in _for_cpu.
 - Change inv to wbinv cache with DMA_FROM_DEVICE in _for_device.

Signed-off-by: Guo Ren &lt;ren_guo@c-sky.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>csky: Fixup dma_alloc_coherent with PAGE_SO attribute</title>
<updated>2019-07-31T03:05:25Z</updated>
<author>
<name>Guo Ren</name>
<email>ren_guo@c-sky.com</email>
</author>
<published>2019-07-30T06:43:22Z</published>
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<id>urn:sha1:7f80fe207de9602aaff028c79345caa68c90cd31</id>
<content type='text'>
This bug is from commit: 2b070ccdf8c0 (fixup abiv2 mmap(... O_SYNC)
failed). In that patch we remove the _PAGE_SO for memory noncache
mapping and this will cause problem when drivers use dma descriptors
to control the transcations without dma_w/rmb().

After referencing other archs' implementation, pgprot_writecombine is
introduced for mmap(... O_SYNC).

Signed-off-by: Guo Ren &lt;ren_guo@c-sky.com&gt;
</content>
</entry>
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