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<title>user/sven/linux.git/arch/mips/include/asm/fixmap.h, branch v3.3.4</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2011-07-25T16:26:53Z</updated>
<entry>
<title>MIPS: Move FIXADDR_TOP into spaces.h</title>
<updated>2011-07-25T16:26:53Z</updated>
<author>
<name>Kevin Cernekee</name>
<email>cernekee@gmail.com</email>
</author>
<published>2010-09-07T19:59:15Z</published>
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<id>urn:sha1:565b60de325070ccc54b18346a1238d4fae17954</id>
<content type='text'>
Memory maps and addressing quirks are normally defined in &lt;spaces.h&gt;.
There are already three targets that need to override FIXADDR_TOP, and
others exist.  This will be a cleaner approach than adding lots of
ifdefs in fixmap.h .

Signed-off-by: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1573/
Acked-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Fix machine check exception in kmap_coherent()</title>
<updated>2009-11-02T11:00:04Z</updated>
<author>
<name>Kevin Cernekee</name>
<email>cernekee@gmail.com</email>
</author>
<published>2009-09-07T18:11:31Z</published>
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<id>urn:sha1:0f334a3e8c3586f81286345eb077ed32b375e8d6</id>
<content type='text'>
On an SMP system with cache aliases, the following sequence of events may
happen:

1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a
   temporary mapping in the fixmap region
2) copy_page() starts on CPU0
3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page()
4) CPU0 takes the interrupt, interrupting copy_page()
5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again
6) The second invocation of kmap_coherent() on CPU0 tries to use the
   same fixmap virtual address that was being used by copy_user_highpage()
7) CPU0 throws a machine check exception for the TLB address conflict

Fixed by creating an extra set of fixmap entries for use in interrupt
handlers.  This prevents fixmap VA conflicts between copy_user_highpage()
running in user context, and local_r4k_flush_cache_page() invoked from an
SMP IPI.

Signed-off-by: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.</title>
<updated>2009-09-17T18:07:52Z</updated>
<author>
<name>Maxime Bizon</name>
<email>mbizon@freebox.fr</email>
</author>
<published>2009-08-18T12:23:37Z</published>
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<content type='text'>
Signed-off-by: Maxime Bizon &lt;mbizon@freebox.fr&gt;
Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Fix highmem.</title>
<updated>2009-05-14T12:50:29Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-04-25T09:25:34Z</published>
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<id>urn:sha1:bb86bf28aec6d0a207ae09f38a43e94133d4d6db</id>
<content type='text'>
Commit 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) rsp.
b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (linux-mips.org):

&gt; From: Chris Dearman &lt;chris@mips.com&gt;
&gt; Date: Wed, 19 Sep 2007 00:58:24 +0100
&gt; Subject: [PATCH] [MIPS] Allow setting of the cache attribute at run time.
&gt;
&gt; Slightly tacky, but there is a precedent in the sparc archirecture code.

introduces the variable _page_cachable_default, which defaults to zero and.
is used to create the prototype PTE for __kmap_atomic in
arch/mips/mm/init.c:kmap_init before initialization in
arch/mips/mm/c-r4k.c:coherency_setup, so the default value of 0 will be
used as the CCA of kmap atomic pages which on many processors is not a
defined CCA value and may result in writes to kmap_atomic pages getting
corrupted.  Debugged by Jon Fraser (jfraser@broadcom.com).

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Move headfiles to new location below arch/mips/include</title>
<updated>2008-10-11T15:18:52Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2008-09-16T17:48:51Z</published>
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<id>urn:sha1:384740dc49ea651ba350704d13ff6be9976e37fe</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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