user/sven/linux.git/arch/mips/include/asm/stackframe.h, branch v3.3.4

MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTC

2011-09-21T15:54:02Z

Reported-by: Edgar E. Iglesias Signed-off-by: David Daney Patchwork: https://patchwork.linux-mips.org/patch/2753/ Signed-off-by: Ralf Baechle

Fix common misspellings

2011-03-31T14:26:23Z

Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi

MIPS: Loongson-2F: Use CONFIG_CPU_JUMP_WORKAROUNDS to control workarounds.

2010-04-30T19:52:58Z

Signed-off-by: Wu Zhangjin Cc: linux-mips Patchwork: http://patchwork.linux-mips.org/patch/1106/ Signed-off-by: Ralf Baechle

MIPS: Loongson-2F: Flush the branch target history in BTB and RAS

2010-04-12T16:26:15Z

As per chapter 15 "Errata: Issue of Out-of-order in loongson"[1] to work around the Loongson 2F erratum we need to do: "When switching from user mode to kernel mode, you should flush the branch target history such as BTB and RAS." [1] Chinese version: http://www.loongson.cn/uploadfile/file/200808211 [2] English version of chapter 15: http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source Signed-off-by: Wu Zhangjin Cc: linux-mips@linux-mips.org Cc: Shinya Kuribayashi Patchwork: http://patchwork.linux-mips.org/patch/1066/ Signed-off-by: Ralf Baechle

MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.

2009-12-17T01:57:01Z

Processors that support the mips64r2 ISA can in four instructions convert a shifted PGD pointer stored in the upper bits of c0_context into a usable pointer. By doing this we save a memory load and associated potential cache miss in the TLB exception handlers. Since the upper bits of c0_context were holding the CPU number, we move this to the upper bits of c0_xcontext which doesn't have enough bits to hold the PGD pointer, but has plenty for the CPU number. Signed-off-by: David Daney Signed-off-by: Ralf Baechle

MIPS: Reorder operations in stackframe.h for better scheduling

2009-12-17T01:56:57Z

Reorder PT ops to avoid pipeline stalls. Signed-off-by: David Daney Signed-off-by: Ralf Baechle

MIPS: Cavium OCTEON multiplier state preservation.

2009-01-11T09:57:24Z

For OCTEON, implement a save and restore of the multiplier state across context switches. Signed-off-by: Tomaso Paoletti Signed-off-by: David Daney Signed-off-by: Ralf Baechle

MIPS: Move headfiles to new location below arch/mips/include

2008-10-11T15:18:52Z

Signed-off-by: Ralf Baechle