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<title>user/sven/linux.git/arch/mips/kernel/proc.c, branch leds/master</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2015-03-19T16:39:49Z</updated>
<entry>
<title>MIPS: Add support for XPA.</title>
<updated>2015-03-19T16:39:49Z</updated>
<author>
<name>Steven J. Hill</name>
<email>Steven.Hill@imgtec.com</email>
</author>
<published>2015-02-27T00:16:38Z</published>
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<id>urn:sha1:c5b367835cfc7a8ef53b9670a409ffcc95194344</id>
<content type='text'>
Add support for extended physical addressing (XPA) so that
32-bit platforms can access equal to or greater than 40 bits
of physical addresses.

NOTE:
      1) XPA and EVA are not the same and cannot be used
         simultaneously.
      2) If you configure your kernel for XPA, the PTEs
         and all address sizes become 64-bit.
      3) Your platform MUST have working HIGHMEM support.

Signed-off-by: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9355/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo</title>
<updated>2015-02-17T15:37:26Z</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2014-11-14T10:10:02Z</published>
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<id>urn:sha1:515a6393dbac4f4492237c7b305bbf9c4c558a1c</id>
<content type='text'>
Print 'mips64r6' and/or 'mips32r6' if the kernel is running on
a MIPS R6 core.

Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: cpu: Add new cpu option for Hardware Table Walker.</title>
<updated>2014-08-01T22:06:38Z</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2014-07-14T11:43:28Z</published>
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<id>urn:sha1:e647e6b5b355bbf58d5c20c181e69474e5aee5fe</id>
<content type='text'>
Moreover, report hardware page table walker support as 'htw' in the ASE
list of /proc/cpuinfo, if the core implements this feature.

Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7334/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Support CPU topology files in sysfs</title>
<updated>2014-07-30T19:45:39Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhc@lemote.com</email>
</author>
<published>2014-06-26T03:41:26Z</published>
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<id>urn:sha1:bda4584cd943d7bb6cf677a8d694700c1984cf3e</id>
<content type='text'>
This patch is prepared for Loongson's NUMA support, it offer meaningful
sysfs files such as physical_package_id, core_id, core_siblings and
thread_siblings in /sys/devices/system/cpu/cpu?/topology.

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
Reviewed-by: Andreas Herrmann &lt;andreas.herrmann@caviumnetworks.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7184/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Revert "MIPS: MT: proc: Add support for printing VPE and TC ids"</title>
<updated>2014-05-12T22:29:33Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-04-03T11:14:05Z</published>
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<id>urn:sha1:5508d456e9992bb81f21d4bd3b1f60f3eb04eb40</id>
<content type='text'>
Reverts commit 795038a6910937fa167d47f6f6183db0eb8fb706 because
d6d3c9afaab47418ab2d7f874fb8aeac1f067104 provides the same functionality
in a more generic way.  Both patches applied however means that the
VPE and TC IDs get printed twice currently.
</content>
</entry>
<entry>
<title>MIPS: MT: proc: Add support for printing VPE and TC ids</title>
<updated>2014-03-31T16:17:12Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-10-16T15:10:07Z</published>
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<id>urn:sha1:d6d3c9afaab47418ab2d7f874fb8aeac1f067104</id>
<content type='text'>
And there are more CPUs or configurations that want to provide special
per-CPU information in /proc/cpuinfo.  So I think there needs to be a
hook mechanism, such as a notifier.

This is a first cut only; I need to think about what sort of looking
the notifier needs to have.  But I'd appreciate testing on MT hardware!

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6066/
</content>
</entry>
<entry>
<title>MIPS: kernel: proc: Add EVA to the list of CPU features</title>
<updated>2014-03-26T22:09:18Z</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2014-01-27T15:10:40Z</published>
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<id>urn:sha1:91119686f33928e2ced93eaedf4191cedbd0e827</id>
<content type='text'>
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Detect the MSA ASE</title>
<updated>2014-03-26T22:09:10Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2014-01-27T15:23:10Z</published>
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<id>urn:sha1:a5e9a69e2cb64c15246291fdc0e27134b9cdce37</id>
<content type='text'>
This patch adds support for probing the MSAP bit within the Config3
register in order to detect the presence of the MSA ASE. Presence of the
ASE will be indicated in /proc/cpuinfo. The value of the MSA
implementation register will be displayed at boot to aid debugging and
verification of a correct setup, as is done for the FPU.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6430/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: /proc/cpuinfo: always print the supported ISA</title>
<updated>2014-01-24T21:39:46Z</updated>
<author>
<name>Aaro Koskinen</name>
<email>aaro.koskinen@iki.fi</email>
</author>
<published>2013-12-30T23:26:31Z</published>
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<id>urn:sha1:41315b6ec108e934884d49f5fde7e1d79b3c42d2</id>
<content type='text'>
Currently the supported ISA is only printed on the latest architectures.
Print it also on legacy platforms.

Signed-off-by: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6295/
</content>
</entry>
<entry>
<title>MIPS: MT: proc: Add support for printing VPE and TC ids</title>
<updated>2014-01-22T19:18:57Z</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2013-10-15T14:13:02Z</published>
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<id>urn:sha1:795038a6910937fa167d47f6f6183db0eb8fb706</id>
<content type='text'>
Add support for including VPE and TC ids in /proc/cpuinfo output as
appropriate when MT/SMTC is enabled.

Reviewed-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/6065/
</content>
</entry>
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