<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/arch/mips/kernel/proc.c, branch v2.6.28.3</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v2.6.28.3</id>
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<updated>2008-10-15T11:46:50Z</updated>
<entry>
<title>MIPS: show_cpuinfo prints the type of the calling CPU</title>
<updated>2008-10-15T11:46:50Z</updated>
<author>
<name>Johannes Dickgreber</name>
<email>tanzy@gmx.de</email>
</author>
<published>2008-10-13T17:36:21Z</published>
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<id>urn:sha1:e47c659b55aff703a2a28e8bd01ee64948eeb417</id>
<content type='text'>
It should print the type of the Nth processor.

Signed-off-by: Johannes Dickgreber &lt;tanzy@gmx.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Probe watch registers and report configuration.</title>
<updated>2008-10-11T15:18:56Z</updated>
<author>
<name>David Daney</name>
<email>ddaney@avtrex.com</email>
</author>
<published>2008-09-23T07:07:16Z</published>
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<id>urn:sha1:654f57bfb467996fb730eae96dc30ea4de989fdc</id>
<content type='text'>
Probe for watch register characteristics, and report them in /proc/cpuinfo.

Signed-off-by: David Daney &lt;ddaney@avtrex.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS]: constify function pointer tables</title>
<updated>2008-01-29T10:15:03Z</updated>
<author>
<name>Jan Engelhardt</name>
<email>jengelh@computergmbh.de</email>
</author>
<published>2008-01-22T19:42:33Z</published>
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<id>urn:sha1:12323cacca2014dcf517d1988fcdb8e44a1f497b</id>
<content type='text'>
Signed-off-by: Jan Engelhardt &lt;jengelh@computergmbh.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] MT: Scheduler support for SMT</title>
<updated>2008-01-29T10:14:57Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-03-02T20:42:04Z</published>
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<id>urn:sha1:0ab7aefc4d43a6dee26c891b41ef9c7a67d2379b</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Fix shadow register support.</title>
<updated>2007-11-15T23:21:49Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-11-08T18:02:29Z</published>
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<id>urn:sha1:f6771dbb27c704ce837ba3bb1dcaa53f48f76ea8</id>
<content type='text'>
Shadow register support would not possibly have worked on multicore
systems.  The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.

SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code.  So fix
the allocator by ditching it.  Move the remaining CPU probe bits into
the generic CPU probe.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Make facility to convert CPU types to strings generally available.</title>
<updated>2007-10-11T22:46:17Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-10-11T22:46:17Z</published>
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<id>urn:sha1:9966db25defba4e1dce263246db25237bc24479f</id>
<content type='text'>
So far /proc/cpuinfo has been the only user but human readable processor
name are more useful than that for proc.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Add support for BCM47XX CPUs.</title>
<updated>2007-10-11T22:46:02Z</updated>
<author>
<name>Aurelien Jarno</name>
<email>aurelien@aurel32.net</email>
</author>
<published>2007-09-25T13:40:12Z</published>
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<id>urn:sha1:1c0c13eb935c95fd2ca0b0aca6dd4860487fb242</id>
<content type='text'>
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
    
It originally comes from the OpenWrt patches.
    
Cc: Michael Buesch &lt;mb@bu3sch.de&gt;
Cc: Felix Fietkau &lt;nbd@openwrt.org&gt;
Cc: Florian Schirmer &lt;jolt@tuxbox.org&gt;
Signed-off-by: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2</title>
<updated>2007-07-10T16:33:02Z</updated>
<author>
<name>Fuxin Zhang</name>
<email>zhangfx@lemote.com</email>
</author>
<published>2007-06-06T06:52:43Z</published>
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<id>urn:sha1:2a21c7300b53b744d16903256a172d9cbcfdd03e</id>
<content type='text'>
Signed-off-by: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}</title>
<updated>2007-07-10T16:32:59Z</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2007-06-04T16:28:07Z</published>
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<id>urn:sha1:b63e804459b9b550c1ab21a43e6bac2272e32612</id>
<content type='text'>
Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Whitespace cleanups.</title>
<updated>2007-02-06T16:53:19Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-02-05T00:10:11Z</published>
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<id>urn:sha1:e0daad449c5195fa4552c60392eeee4e5c58d31c</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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