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<title>user/sven/linux.git/arch/mips/kernel/proc.c, branch v3.3.4</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v3.3.4</id>
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<updated>2011-01-18T18:30:22Z</updated>
<entry>
<title>MIPS: Probe for presence of KScratch registers.</title>
<updated>2011-01-18T18:30:22Z</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2010-12-21T22:19:09Z</published>
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<id>urn:sha1:e77c32fe284a4da1b4e0994890a4d3527812eb61</id>
<content type='text'>
Probe c0_config4 for KScratch registers and report them in /proc/cpuinfo.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1877/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add generic support for multiple machines within a single kernel</title>
<updated>2011-01-18T18:30:21Z</updated>
<author>
<name>Gabor Juhos</name>
<email>juhosg@openwrt.org</email>
</author>
<published>2010-11-23T15:06:25Z</published>
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<id>urn:sha1:487d70d0b8bd1c70d099a7526077ffefee412050</id>
<content type='text'>
This patch adds a generic solution to support multiple machines based on
a given SoC within a single kernel image. It is implemented already for
several other architectures but MIPS has no generic support for that yet.

[Ralf: This competes with DT but DT is a much more complex solution and this
code has been used by OpenWRT for a long time so for now DT is a bad reason
to stop the merge but longer term this should be migrated to DT.]

Signed-off-by: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: kaloz@openwrt.org
Cc: Luis R. Rodriguez &lt;lrodriguez@atheros.com&gt;
Cc: Cliff Holden &lt;Cliff.Holden@Atheros.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/1814/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Eleminate filenames from comments</title>
<updated>2009-08-03T16:52:40Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-07-06T08:13:17Z</published>
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<id>urn:sha1:49316cbf0a9875f102f98dc8b7c80cfa142e33cf</id>
<content type='text'>
They tend to get not updated when files are moved around or copied and
lack any obvious use.  While at it zap some only too obvious comments and
as per Shinya's suggestion, add a copyright header to extable.c.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Acked-by: Shinya Kuribayashi &lt;shinya.kuribayashi@necel.com&gt;
Acked-by: Thadeu Lima de Souza Cascardo &lt;cascardo@holoscopio.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Outline udelay and fix a few issues.</title>
<updated>2009-06-08T15:57:51Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2009-02-28T09:44:28Z</published>
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<id>urn:sha1:5636919b5c909fee54a6ef5226475ecae012ad02</id>
<content type='text'>
Outlining fixes the issue were on certain CPUs such as the R10000 family
the delay loop would need an extra cycle if it overlaps a cacheline
boundary.

The rewrite also fixes build errors with GCC 4.4 which was changed in
way incompatible with the kernel's inline assembly.

Relying on pure C for computation of the delay value removes the need for
explicit.  The price we pay is a slight slowdown of the computation - to
be fixed on another day.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: show_cpuinfo prints the type of the calling CPU</title>
<updated>2008-10-15T11:46:50Z</updated>
<author>
<name>Johannes Dickgreber</name>
<email>tanzy@gmx.de</email>
</author>
<published>2008-10-13T17:36:21Z</published>
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<id>urn:sha1:e47c659b55aff703a2a28e8bd01ee64948eeb417</id>
<content type='text'>
It should print the type of the Nth processor.

Signed-off-by: Johannes Dickgreber &lt;tanzy@gmx.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Probe watch registers and report configuration.</title>
<updated>2008-10-11T15:18:56Z</updated>
<author>
<name>David Daney</name>
<email>ddaney@avtrex.com</email>
</author>
<published>2008-09-23T07:07:16Z</published>
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<id>urn:sha1:654f57bfb467996fb730eae96dc30ea4de989fdc</id>
<content type='text'>
Probe for watch register characteristics, and report them in /proc/cpuinfo.

Signed-off-by: David Daney &lt;ddaney@avtrex.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS]: constify function pointer tables</title>
<updated>2008-01-29T10:15:03Z</updated>
<author>
<name>Jan Engelhardt</name>
<email>jengelh@computergmbh.de</email>
</author>
<published>2008-01-22T19:42:33Z</published>
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<id>urn:sha1:12323cacca2014dcf517d1988fcdb8e44a1f497b</id>
<content type='text'>
Signed-off-by: Jan Engelhardt &lt;jengelh@computergmbh.de&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] MT: Scheduler support for SMT</title>
<updated>2008-01-29T10:14:57Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-03-02T20:42:04Z</published>
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<id>urn:sha1:0ab7aefc4d43a6dee26c891b41ef9c7a67d2379b</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Fix shadow register support.</title>
<updated>2007-11-15T23:21:49Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-11-08T18:02:29Z</published>
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<id>urn:sha1:f6771dbb27c704ce837ba3bb1dcaa53f48f76ea8</id>
<content type='text'>
Shadow register support would not possibly have worked on multicore
systems.  The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.

SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code.  So fix
the allocator by ditching it.  Move the remaining CPU probe bits into
the generic CPU probe.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Make facility to convert CPU types to strings generally available.</title>
<updated>2007-10-11T22:46:17Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-10-11T22:46:17Z</published>
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<id>urn:sha1:9966db25defba4e1dce263246db25237bc24479f</id>
<content type='text'>
So far /proc/cpuinfo has been the only user but human readable processor
name are more useful than that for proc.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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