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<title>user/sven/linux.git/arch/mips/kernel/time.c, branch leds/master</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2014-05-23T22:07:01Z</updated>
<entry>
<title>MIPS: MT: Remove SMTC support</title>
<updated>2014-05-23T22:07:01Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-05-23T14:29:44Z</published>
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<id>urn:sha1:b633648c5ad3cfbda0b3daea50d2135d44899259</id>
<content type='text'>
Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell &lt;kevink@paralogos.com&gt; is an ingenious demonstration for the MT
ASE's power and elegance.

Based on Markos Chandras &lt;Markos.Chandras@imgtec.com&gt; patch
https://patchwork.linux-mips.org/patch/6719/ which while very similar did
no longer apply cleanly when I tried to merge it plus some additional
post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
merge once upon a time.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Optimize current_cpu_type() for better code.</title>
<updated>2013-09-17T16:50:53Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-09-17T08:25:47Z</published>
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<id>urn:sha1:69f24d1784b631b81a54eb57c49bf46536dd2382</id>
<content type='text'>
 o Move current_cpu_type() to a separate header file
 o #ifdefing on supported CPU types lets modern GCC know that certain
   code in callers may be discarded ideally turning current_cpu_type() into
   a function returning a constant.
 o Use current_cpu_type() rather than direct access to struct cpuinfo_mips.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5833/
</content>
</entry>
<entry>
<title>MIPS: R4k clock source initialization bug fix</title>
<updated>2013-09-03T12:44:02Z</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@linux-mips.org</email>
</author>
<published>2013-09-03T00:29:58Z</published>
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<id>urn:sha1:afddce0cc9f22c72e6ee7350a0e90b04aaa470b2</id>
<content type='text'>
This is a fix for a bug introduced with commit
447cdf2628b59aa513a42785450b348dced26d8a, submitted as archived here:
http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&amp;i=20080312235002.c717dde3.yoichi_yuasa%40tripeaks.co.jp
regrettably with no further explanation.

The issue is with the CP0 Count register read erratum present on R4000 and
some R4400 processors.  If this erratum is present, then a read from this
register that happens around the time it reaches the value stored in the
CP0 Compare register causes a CP0 timer interrupt that is supposed to
happen when the values in the two registers match to be missed.  The
implication for the chips affected is the CP0 timer can be used either as
a source of a timer interrupt (a clock event) or as a source of a
high-resolution counter (a clock source), but not both at a time.

The erratum does not affect timer interrupt operation itself, because in
this case the CP0 Count register is only read while the timer interrupt
has already been raised, while high-resolution counter references happen
at random times.

Additionally some systems apparently have issues with the timer interrupt
line being routed externally and not following the usual CP0 Count/Compare
semantics.  In this case we don't want to use the R4k clock event.

We've meant to address the erratum and the timer interrupt routing issue
in time_init, however the commit referred to above broke our solution.
What we currently have is we enable the R4k clock source if the R4k clock
event initialization has succeeded (the timer is present and has no timer
interrupt routing issue) or there is no CP0 Count register read erratum.
Which gives the following boolean matrix:

clock event | count erratum =&gt; clock source
------------+---------------+--------------
     0      |       0       |      1 (OK)
     0      |       1       |      0 (bug!) -&gt; no interference, could use
     1      |       0       |      1 (OK)
     1      |       1       |      1 (bug!) -&gt; can't use, interference

What we want instead is to enable the R4k clock source if there is no CP0
Count register read erratum (obviously) or the R4k clock event
initialization has *failed* -- because in the latter case we won't be
using the timer interrupt anyway, so we don't care about any interference
CP0 Count reads might cause with the interrupt.  This corresponds to the
following boolean matrix:

clock event | count erratum =&gt; clock source
------------+---------------+--------------
     0      |       0       |      1
     0      |       1       |      1
     1      |       0       |      1
     1      |       1       |      0

This is implemented here, effectively reverting the problematic commit,
and a short explanation is given next to code modified so that the
rationale is known to future readers and confusion is prevented from
happening here again.

It is worth noting that mips_clockevent_init returns 0 upon success while
cpu_has_mfc0_count_bug returns 0 upon failure.  This is because the former
function returns an error code while the latter returns a boolean value.
To signify the difference I have therefore chosen to compare the result of
the former call explicitly against 0.

Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5799/
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-01-22T11:59:30Z</published>
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<id>urn:sha1:7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>mips: migrate core kernel file from module.h --&gt; export.h</title>
<updated>2011-10-31T23:30:56Z</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2011-07-23T20:30:40Z</published>
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<id>urn:sha1:73bc256d47a23272ce1dd50b4de64a0ff23d01f1</id>
<content type='text'>
These files are not modules, but were including module.h only for
EXPORT_SYMBOL and/or THIS_MODULE.  Now that we have the lightweight
export.h, use it in these kinds of cases.

Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
</content>
</entry>
<entry>
<title>Fix common misspellings</title>
<updated>2011-03-31T14:26:23Z</updated>
<author>
<name>Lucas De Marchi</name>
<email>lucas.demarchi@profusion.mobi</email>
</author>
<published>2011-03-31T01:57:33Z</published>
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<id>urn:sha1:25985edcedea6396277003854657b5f3cb31a628</id>
<content type='text'>
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@profusion.mobi&gt;
</content>
</entry>
<entry>
<title>mips: Use generic mult/shift factor calculation for clocks</title>
<updated>2009-11-13T19:46:24Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2009-11-11T14:05:34Z</published>
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<id>urn:sha1:e3a4fab0c0c30e21e104712f4e9cb39f175d0f21</id>
<content type='text'>
Replace the MIPS functions of mult/shift factor calculation for clock
events and clock sources with inline functions which call the generic
functions. The minimum guaranteed conversion range is set to 4 seconds
which corresponds to the current MIPS implementation.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Mikael Pettersson &lt;mikpe@it.uu.se&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Acked-by: Linus Walleij &lt;linus.walleij@stericsson.com&gt;
Cc: John Stultz &lt;johnstul@us.ibm.com&gt;
LKML-Reference: &lt;20091111134229.807255074@linutronix.de&gt;
</content>
</entry>
<entry>
<title>[MIPS] unexport null_perf_irq() and make it static</title>
<updated>2008-04-28T16:14:31Z</updated>
<author>
<name>Dmitri Vorobiev</name>
<email>dmitri.vorobiev@gmail.com</email>
</author>
<published>2008-04-01T23:58:38Z</published>
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<id>urn:sha1:46684734dd6a55af09c3fe799af7d74cb938684c</id>
<content type='text'>
This patch unexports the null_perf_irq() symbol, and simultaneously
makes this function static.

Signed-off-by: Dmitri Vorobiev &lt;dmitri.vorobiev@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] unexport rtc_mips_set_time()</title>
<updated>2008-04-28T16:14:30Z</updated>
<author>
<name>Dmitri Vorobiev</name>
<email>dmitri.vorobiev@gmail.com</email>
</author>
<published>2008-04-01T23:58:37Z</published>
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<id>urn:sha1:c5b0680aa1d7a751b7dd8ebf6854e5baf0a2e54b</id>
<content type='text'>
No users for the rtc_mips_set_time() routine exist outside of the
core kernel code. Therefore, EXPORT_SYMBOL(rtc_mips_set_time) is
useless, and this patch removes it.

Signed-off-by: Dmitri Vorobiev &lt;dmitri.vorobiev@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>[MIPS] Fix the installation condition of MIPS clocksource</title>
<updated>2008-04-01T14:46:33Z</updated>
<author>
<name>Yoichi Yuasa</name>
<email>yoichi_yuasa@tripeaks.co.jp</email>
</author>
<published>2008-03-12T14:50:02Z</published>
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<id>urn:sha1:447cdf2628b59aa513a42785450b348dced26d8a</id>
<content type='text'>
Signed-off-by: Yoichi Yuasa &lt;yoichi_yuasa@tripeaks.co.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
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