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<title>user/sven/linux.git/arch/x86/include/asm/cache.h, branch v3.2.58</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2010-03-03T10:26:00Z</updated>
<entry>
<title>Rename .data.read_mostly to .data..read_mostly.</title>
<updated>2010-03-03T10:26:00Z</updated>
<author>
<name>Denys Vlasenko</name>
<email>vda.linux@googlemail.com</email>
</author>
<published>2010-02-20T00:03:44Z</published>
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<id>urn:sha1:54cb27a71f51d304342c79e62fd7667f2171062b</id>
<content type='text'>
Signed-off-by: Denys Vlasenko &lt;vda.linux@googlemail.com&gt;
Signed-off-by: Michal Marek &lt;mmarek@suse.cz&gt;
</content>
</entry>
<entry>
<title>x86: Eliminate redundant/contradicting cache line size config options</title>
<updated>2009-11-19T03:58:34Z</updated>
<author>
<name>Jan Beulich</name>
<email>JBeulich@novell.com</email>
</author>
<published>2009-11-13T11:54:40Z</published>
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<id>urn:sha1:350f8f5631922c7848ec4b530c111cb8c2ff7caa</id>
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Rather than having X86_L1_CACHE_BYTES and X86_L1_CACHE_SHIFT
(with inconsistent defaults), just having the latter suffices as
the former can be easily calculated from it.

To be consistent, also change X86_INTERNODE_CACHE_BYTES to
X86_INTERNODE_CACHE_SHIFT, and set it to 7 (128 bytes) for NUMA
to account for last level cache line size (which here matters
more than L1 cache line size).

Finally, make sure the default value for X86_L1_CACHE_SHIFT,
when X86_GENERIC is selected, is being seen before that for the
individual CPU model options (other than on x86-64, where
GENERIC_CPU is part of the choice construct, X86_GENERIC is a
separate option on ix86).

Signed-off-by: Jan Beulich &lt;jbeulich@novell.com&gt;
Acked-by: Ravikiran Thirumalai &lt;kiran@scalex86.org&gt;
Acked-by: Nick Piggin &lt;npiggin@suse.de&gt;
LKML-Reference: &lt;4AFD5710020000780001F8F0@vpn.id2.novell.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>Use macros for .data.page_aligned section.</title>
<updated>2009-09-21T04:27:08Z</updated>
<author>
<name>Tim Abbott</name>
<email>tabbott@ksplice.com</email>
</author>
<published>2009-09-20T22:14:15Z</published>
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<id>urn:sha1:abe1ee3a221d53778c3e58747bbec6e518e5471b</id>
<content type='text'>
This patch changes the remaining direct references to
.data.page_aligned in C and assembly code to use the macros in
include/linux/linkage.h.

Signed-off-by: Tim Abbott &lt;tabbott@ksplice.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Haavard Skinnemoen &lt;hskinnemoen@atmel.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
Signed-off-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
</content>
</entry>
<entry>
<title>x86: Fix ASM_X86__ header guards</title>
<updated>2008-10-23T05:55:23Z</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@zytor.com</email>
</author>
<published>2008-10-23T05:26:29Z</published>
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<id>urn:sha1:1965aae3c98397aad957412413c07e97b1bd4e64</id>
<content type='text'>
Change header guards named "ASM_X86__*" to "_ASM_X86_*" since:

a. the double underscore is ugly and pointless.
b. no leading underscore violates namespace constraints.

Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
</content>
</entry>
<entry>
<title>x86, um: ... and asm-x86 move</title>
<updated>2008-10-23T05:55:20Z</updated>
<author>
<name>Al Viro</name>
<email>viro@zeniv.linux.org.uk</email>
</author>
<published>2008-08-18T01:05:42Z</published>
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<id>urn:sha1:bb8985586b7a906e116db835c64773b7a7d51663</id>
<content type='text'>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
</content>
</entry>
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