Linux Kernel https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v2.6.27.8 2008-09-08T04:29:54Z 2008-09-08T04:29:54Z Herbert Xu herbert@gondor.apana.org.au 2008-09-08T04:29:54Z urn:sha1:f4c4cd6d14e3a3f638475f2f83e26765a7d3327b This reverts commit bd699f2df6dbc2f4cba528fe598bd63a4d3702c5, which causes camellia to fail the included self-test vectors. It has also been confirmed that it breaks existing encrypted disks using camellia. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2008-09-05T15:15:47Z Yuri Tikhonov yur@emcraft.com 2008-09-05T15:15:47Z urn:sha1:de24125dd0a452bfd4502fc448e3534c5d2e87aa Should clear the next pointer of the TX if we are sure that the next TX (say NXT) will be submitted to the channel too. Overwise, we break the chain of descriptors, because we lose the information about the next descriptor to run. So next time, when invoke async_tx_run_dependencies() with TX, it's TX->next will be NULL, and NXT will be never submitted. Cc: <stable@kernel.org> [2.6.26] Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2008-08-22T15:04:06Z Herbert Xu herbert@gondor.apana.org.au 2008-08-22T15:04:06Z urn:sha1:a697690bece75d4ba424c1318eb25c37d41d5829 Authenc works in two stages for encryption, it first encrypts and then computes an ICV. The context memory of the request is used by both operations. The problem is that when an asynchronous encryption completes, we will compute the ICV and then reread the context memory of the encryption to get the original request. It just happens that we have a buffer of 16 bytes in front of the request pointer, so ICVs of 16 bytes (such as SHA1) do not trigger the bug. However, any attempt to uses a larger ICV instantly kills the machine when the first asynchronous encryption is completed. This patch fixes this by saving the request pointer before we start the ICV computation. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2008-08-13T10:08:38Z Herbert Xu herbert@gondor.apana.org.au 2008-08-03T13:19:43Z urn:sha1:dbaaba1d0abf6871c7db6e3d15a46206bc386db1 The changeset ca786dc738f4f583b57b1bba7a335b5e8233f4b0 crypto: hash - Fixed digest size check missed one spot for the digest type. This patch corrects that error. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2008-08-13T10:08:36Z Herbert Xu herbert@gondor.apana.org.au 2008-07-30T08:23:51Z urn:sha1:f176e632efad33aeb2d3c5ddfa86861c0d60553c My changeset 4b22f0ddb6564210c9ded7ba25b2a1007733e784 crypto: tcrpyt - Remove unnecessary kmap/kunmap calls introduced a typo that broke AEAD chunk testing. In particular, axbuf should really be xbuf. There is also an issue with testing the last segment when encrypting. The additional part produced by AEAD wasn't tested. Similarly, on decryption the additional part of the AEAD input is mistaken for corruption. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2008-08-05T17:25:20Z Dan Williams dan.j.williams@intel.com 2008-08-05T17:22:05Z urn:sha1:e34a8ae79056e6cea4a1ac21119ee3c91f378f99 Found-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2008-07-23T19:03:18Z Linus Torvalds torvalds@linux-foundation.org 2008-07-23T19:03:18Z urn:sha1:5554b35933245e95710d709175e14c02cbc956a4 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (24 commits) I/OAT: I/OAT version 3.0 support I/OAT: tcp_dma_copybreak default value dependent on I/OAT version I/OAT: Add watchdog/reset functionality to ioatdma iop_adma: cleanup iop_chan_xor_slot_count iop_adma: document how to calculate the minimum descriptor pool size iop_adma: directly reclaim descriptors on allocation failure async_tx: make async_tx_test_ack a boolean routine async_tx: remove depend_tx from async_tx_sync_epilog async_tx: export async_tx_quiesce async_tx: fix handling of the "out of descriptor" condition in async_xor async_tx: ensure the xor destination buffer remains dma-mapped async_tx: list_for_each_entry_rcu() cleanup dmaengine: Driver for the Synopsys DesignWare DMA controller dmaengine: Add slave DMA interface dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap dmaengine: Add dma_client parameter to device_alloc_chan_resources dmatest: Simple DMA memcpy test client dmaengine: DMA engine driver for Marvell XOR engine iop-adma: fix platform driver hotplug/coldplug dmaengine: track the number of clients using a channel ... Fixed up conflict in drivers/dca/dca-sysfs.c manually 2008-07-18T00:59:55Z Dan Williams dan.j.williams@intel.com 2008-07-18T00:59:55Z urn:sha1:3dce01713723bbcc92562bd4488e8b840a4f786c All callers of async_tx_sync_epilog have called async_tx_quiesce on the depend_tx, so async_tx_sync_epilog need only call the callback to complete the operation. Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2008-07-18T00:59:55Z Dan Williams dan.j.williams@intel.com 2008-07-18T00:59:55Z urn:sha1:d2c52b7983b95bb3fc2a784e479f832f142d4523 Replace open coded "wait and acknowledge" instances with async_tx_quiesce. Signed-off-by: Dan Williams <dan.j.williams@intel.com> 2008-07-18T00:59:55Z Dan Williams dan.j.williams@intel.com 2008-07-18T00:59:55Z urn:sha1:669ab0b210f9bd15d94d4d6a49ae13366a85e4da Ensure forward progress is made when a dmaengine driver is unable to allocate an xor descriptor by breaking the dependency chain with async_tx_quisce() and issue any pending descriptors. Tested with iop-adma by setting device->max_xor = 2 to force multiple calls to device_prep_dma_xor for each call to async_xor and limiting the descriptor slot pool to 5. Discovered that the minimum descriptor pool size for iop-adma is 2 * iop_chan_xor_slot_cnt(device->max_xor) + 1. Signed-off-by: Dan Williams <dan.j.williams@intel.com>