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<title>user/sven/linux.git/drivers/base/regmap/regcache.c, branch v3.18.131</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2015-04-17T00:11:29Z</updated>
<entry>
<title>regmap: introduce regmap_name to fix syscon regmap trace events</title>
<updated>2015-04-17T00:11:29Z</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2015-03-09T11:20:13Z</published>
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[ Upstream commit c6b570d97c0e77f570bb6b2ed30d372b2b1e9aae ]

This patch fixes a NULL pointer dereference when enabling regmap event
tracing in the presence of a syscon regmap, introduced by commit bdb0066df96e
("mfd: syscon: Decouple syscon interface from platform devices").
That patch introduced syscon regmaps that have their dev field set to NULL.
The regmap trace events expect it to point to a valid struct device and feed
it to dev_name():

  $ echo 1 &gt; /sys/kernel/debug/tracing/events/regmap/enable

  Unable to handle kernel NULL pointer dereference at virtual address 0000002c
  pgd = 80004000
  [0000002c] *pgd=00000000
  Internal error: Oops: 17 [#1] SMP ARM
  Modules linked in: coda videobuf2_vmalloc
  CPU: 0 PID: 304 Comm: kworker/0:2 Not tainted 4.0.0-rc2+ #9197
  Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
  Workqueue: events_freezable thermal_zone_device_check
  task: 9f25a200 ti: 9f1ee000 task.ti: 9f1ee000
  PC is at ftrace_raw_event_regmap_block+0x3c/0xe4
  LR is at _regmap_raw_read+0x1bc/0x1cc
  pc : [&lt;803636e8&gt;]    lr : [&lt;80365f2c&gt;]    psr: 600f0093
  sp : 9f1efd78  ip : 9f1efdb8  fp : 9f1efdb4
  r10: 00000004  r9 : 00000001  r8 : 00000001
  r7 : 00000180  r6 : 00000000  r5 : 9f00e3c0  r4 : 00000003
  r3 : 00000001  r2 : 00000180  r1 : 00000000  r0 : 9f00e3c0
  Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
  Control: 10c5387d  Table: 2d91004a  DAC: 00000015
  Process kworker/0:2 (pid: 304, stack limit = 0x9f1ee210)
  Stack: (0x9f1efd78 to 0x9f1f0000)
  fd60:                                                       9f1efda4 9f1efd88
  fd80: 800708c0 805f9510 80927140 800f0013 9f1fc800 9eb2f490 00000000 00000180
  fda0: 808e3840 00000001 9f1efdfc 9f1efdb8 80365f2c 803636b8 805f8958 800708e0
  fdc0: a00f0013 803636ac 9f16de00 00000180 80927140 9f1fc800 9f1fc800 9f1efe6c
  fde0: 9f1efe6c 9f732400 00000000 00000000 9f1efe1c 9f1efe00 80365f70 80365d7c
  fe00: 80365f3c 9f1fc800 9f1fc800 00000180 9f1efe44 9f1efe20 803656a4 80365f48
  fe20: 9f1fc800 00000180 9f1efe6c 9f1efe6c 9f732400 00000000 9f1efe64 9f1efe48
  fe40: 803657bc 80365634 00000001 9e95f910 9f1fc800 9f1efeb4 9f1efe8c 9f1efe68
  fe60: 80452ac0 80365778 9f1efe8c 9f1efe78 9e93d400 9e93d5e8 9f1efeb4 9f72ef40
  fe80: 9f1efeac 9f1efe90 8044e11c 80452998 8045298c 9e93d608 9e93d400 808e1978
  fea0: 9f1efecc 9f1efeb0 8044fd14 8044e0d0 ffffffff 9f25a200 9e93d608 9e481380
  fec0: 9f1efedc 9f1efed0 8044fde8 8044fcec 9f1eff1c 9f1efee0 80038d50 8044fdd8
  fee0: 9f1ee020 9f72ef40 9e481398 00000000 00000008 9f72ef54 9f1ee020 9f72ef40
  ff00: 9e481398 9e481380 00000008 9f72ef40 9f1eff5c 9f1eff20 80039754 80038bfc
  ff20: 00000000 9e481380 80894100 808e1662 00000000 9e4f2ec0 00000000 9e481380
  ff40: 800396f8 00000000 00000000 00000000 9f1effac 9f1eff60 8003e020 80039704
  ff60: ffffffff 00000000 ffffffff 9e481380 00000000 00000000 9f1eff78 9f1eff78
  ff80: 00000000 00000000 9f1eff88 9f1eff88 9e4f2ec0 8003df30 00000000 00000000
  ffa0: 00000000 9f1effb0 8000eb60 8003df3c 00000000 00000000 00000000 00000000
  ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
  ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffffffff ffffffff
  Backtrace:
  [&lt;803636ac&gt;] (ftrace_raw_event_regmap_block) from [&lt;80365f2c&gt;] (_regmap_raw_read+0x1bc/0x1cc)
   r9:00000001 r8:808e3840 r7:00000180 r6:00000000 r5:9eb2f490 r4:9f1fc800
  [&lt;80365d70&gt;] (_regmap_raw_read) from [&lt;80365f70&gt;] (_regmap_bus_read+0x34/0x6c)
   r10:00000000 r9:00000000 r8:9f732400 r7:9f1efe6c r6:9f1efe6c r5:9f1fc800
   r4:9f1fc800
  [&lt;80365f3c&gt;] (_regmap_bus_read) from [&lt;803656a4&gt;] (_regmap_read+0x7c/0x144)
   r6:00000180 r5:9f1fc800 r4:9f1fc800 r3:80365f3c
  [&lt;80365628&gt;] (_regmap_read) from [&lt;803657bc&gt;] (regmap_read+0x50/0x70)
   r9:00000000 r8:9f732400 r7:9f1efe6c r6:9f1efe6c r5:00000180 r4:9f1fc800
  [&lt;8036576c&gt;] (regmap_read) from [&lt;80452ac0&gt;] (imx_get_temp+0x134/0x1a4)
   r6:9f1efeb4 r5:9f1fc800 r4:9e95f910 r3:00000001
  [&lt;8045298c&gt;] (imx_get_temp) from [&lt;8044e11c&gt;] (thermal_zone_get_temp+0x58/0x74)
   r7:9f72ef40 r6:9f1efeb4 r5:9e93d5e8 r4:9e93d400
  [&lt;8044e0c4&gt;] (thermal_zone_get_temp) from [&lt;8044fd14&gt;] (thermal_zone_device_update+0x34/0xec)
   r6:808e1978 r5:9e93d400 r4:9e93d608 r3:8045298c
  [&lt;8044fce0&gt;] (thermal_zone_device_update) from [&lt;8044fde8&gt;] (thermal_zone_device_check+0x1c/0x20)
   r5:9e481380 r4:9e93d608
  [&lt;8044fdcc&gt;] (thermal_zone_device_check) from [&lt;80038d50&gt;] (process_one_work+0x160/0x3d4)
  [&lt;80038bf0&gt;] (process_one_work) from [&lt;80039754&gt;] (worker_thread+0x5c/0x4f4)
   r10:9f72ef40 r9:00000008 r8:9e481380 r7:9e481398 r6:9f72ef40 r5:9f1ee020
   r4:9f72ef54
  [&lt;800396f8&gt;] (worker_thread) from [&lt;8003e020&gt;] (kthread+0xf0/0x108)
   r10:00000000 r9:00000000 r8:00000000 r7:800396f8 r6:9e481380 r5:00000000
   r4:9e4f2ec0
  [&lt;8003df30&gt;] (kthread) from [&lt;8000eb60&gt;] (ret_from_fork+0x14/0x34)
   r7:00000000 r6:00000000 r5:8003df30 r4:9e4f2ec0
  Code: e3140040 1a00001a e3140020 1a000016 (e596002c)
  ---[ end trace 193c15c2494ec960 ]---

Fixes: bdb0066df96e (mfd: syscon: Decouple syscon interface from platform devices)
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'regmap/topic/cache' into regmap-next</title>
<updated>2014-09-29T19:49:42Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2014-09-29T19:49:42Z</published>
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<id>urn:sha1:f5b313a2bcd4c436560c044c726d9ad84a3e4bb3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>regmap: cache: Do not fail silently from regcache_sync calls</title>
<updated>2014-09-16T16:53:40Z</updated>
<author>
<name>Jarkko Nikula</name>
<email>jarkko.nikula@linux.intel.com</email>
</author>
<published>2014-09-16T11:04:14Z</published>
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<id>urn:sha1:f29a43206ae1adfadbb344f5ef9bc200784f9d61</id>
<content type='text'>
Call stack of regcache_sync calls may not emit any error message even if
operation was cancelled due an error in I/O driver. One such a silent error
is for instance if I2C bus driver doesn't receive ACK from the I2C device
and returns -EREMOTEIO.

Since many users of regcache_sync() don't check and print the error there is
no any indication that HW registers are potentially out of sync.

Signed-off-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>regmap: Don't attempt block writes when syncing cache on single_rw devices</title>
<updated>2014-08-31T12:22:37Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2014-08-27T12:09:12Z</published>
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<id>urn:sha1:5c1ebe7f73f9166893c3459915db8a09d6d1d715</id>
<content type='text'>
If the device can't support block writes then don't attempt to use raw
syncing which will automatically generate block writes for adjacent
registers, use the existing _single() block syncing implementation.

Reported-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Tested-by: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>Merge remote-tracking branches 'regmap/topic/cache', 'regmap/topic/irq', 'regmap/topic/lock', 'regmap/topic/mmio', 'regmap/topic/nodev', 'regmap/topic/parse-val' and 'regmap/topic/patch' into regmap-next</title>
<updated>2014-03-28T11:50:43Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2014-03-28T11:50:43Z</published>
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<id>urn:sha1:6012b1f3424c4dc36369697845a9ca699887b0c7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>regmap: cache: Don't attempt to sync non-writeable registers</title>
<updated>2014-03-19T10:38:56Z</updated>
<author>
<name>Dylan Reid</name>
<email>dgreid@chromium.org</email>
</author>
<published>2014-03-18T20:45:09Z</published>
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<id>urn:sha1:83f8475ce99fa1c44b03059b6cc5dcaae69b4819</id>
<content type='text'>
In the regcache_default_sync, if a register isn't writeable, then
_regmap_write will return an error and the rest of the sync will be
aborted.  Avoid this by checking if a register is writeable before
trying to sync it.

Signed-off-by: Dylan Reid &lt;dgreid@chromium.org&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: cache: Step by stride in default sync</title>
<updated>2014-03-19T10:38:54Z</updated>
<author>
<name>Dylan Reid</name>
<email>dgreid@chromium.org</email>
</author>
<published>2014-03-18T20:45:08Z</published>
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<id>urn:sha1:756173285e87c792c6fa8eaaaf1217cfcf1416dd</id>
<content type='text'>
The default sync operation was still assuming a stride of one, fix it
to respect the reg_stride set in the map.

Signed-off-by: Dylan Reid &lt;dgreid@chromium.org&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: Check stride of register patch as we register it</title>
<updated>2014-02-22T02:15:13Z</updated>
<author>
<name>Charles Keepax</name>
<email>ckeepax@opensource.wolfsonmicro.com</email>
</author>
<published>2014-02-21T19:37:10Z</published>
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<id>urn:sha1:7a7a70b49b51e90593ae072a9402d6615d05e895</id>
<content type='text'>
Currently, we check the registers in the patch are aligned to the
register stride everytime we sync the cache and the first time the patch
is written out is unchecked.

This patch checks the register patch when we first register it so the
first writes are no longer unchecked and then doesn't check on
subsequent syncs as the patch will be unchanged.

Signed-off-by: Charles Keepax &lt;ckeepax@opensource.wolfsonmicro.com&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: cache: Handle stride &gt; 1 in sync_block_raw_flush</title>
<updated>2014-01-27T18:25:11Z</updated>
<author>
<name>Dylan Reid</name>
<email>dgreid@chromium.org</email>
</author>
<published>2014-01-24T23:40:39Z</published>
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<id>urn:sha1:78ba73eecd2256790926859849801c0446766c0a</id>
<content type='text'>
regcache_sync_block_raw_flush takes the address of the base register
and the address of one past the last register to write to.  "count" is
the number of registers in the range, not the number of bytes, it
should be (end addr - start addr) / stride. Without accounting for
strides greater than one, registers past the end might be synced or
the writeable_reg callback at the beginning of _regmap_raw_write will
fail and nothing will be written.

Signed-off-by: Dylan Reid &lt;dgreid@chromium.org&gt;
Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
<entry>
<title>regmap: Use async I/O during cache sync</title>
<updated>2013-10-10T20:15:23Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@linaro.org</email>
</author>
<published>2013-10-10T20:06:32Z</published>
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<id>urn:sha1:affbe886e712437c25b575eac5fde5886bb42aec</id>
<content type='text'>
Try to speed up I/O a little by not synchronising until we are finished
scheduling writes. A brief survey of existing users suggests we have none
that would currently benefit from an async cache sync.

Signed-off-by: Mark Brown &lt;broonie@linaro.org&gt;
</content>
</entry>
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