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<title>user/sven/linux.git/drivers/base/regmap, branch v6.15.1</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.15.1</id>
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<updated>2025-03-29T21:31:39Z</updated>
<entry>
<title>Merge tag 'regmap-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap</title>
<updated>2025-03-29T21:31:39Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-03-29T21:31:39Z</published>
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<id>urn:sha1:054b7477e3bfdd562b723ce5e227bd3fd2621f51</id>
<content type='text'>
Pull regmap updates from Mark Brown:
 "Only a couple of small patches this release, one refactoring struct
  regmap to pack it more efficiently and another which makes our way of
  setting all bits consistent in the regmap-irq code"

* tag 'regmap-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
  regmap: irq: Use one way of setting all bits in the register
  regmap: Reorder 'struct regmap'
</content>
</entry>
<entry>
<title>regcache: Add support for sorting defaults arrays</title>
<updated>2025-02-27T13:09:11Z</updated>
<author>
<name>Charles Keepax</name>
<email>ckeepax@opensource.cirrus.com</email>
</author>
<published>2025-02-17T14:01:56Z</published>
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<id>urn:sha1:fd80df352ba1884ce2b62dd8d9495582308101b7</id>
<content type='text'>
The defaults array in regcache must be sorted into ascending register
address order, because binary search is used to locate values in
the array. Add a helper to sort the register defaults array which
can be useful for systems that dynamically create a defaults array
based on external information.

Signed-off-by: Charles Keepax &lt;ckeepax@opensource.cirrus.com&gt;
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.dev&gt;
Link: https://patch.msgid.link/20250217140159.2288784-2-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>regmap: irq: Use one way of setting all bits in the register</title>
<updated>2025-02-06T20:46:09Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2025-02-06T19:16:30Z</published>
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<id>urn:sha1:153dbf4adad0082d030c30d20541df2b1af52db6</id>
<content type='text'>
Currently there are two ways of how we represent all bits set, i.e.
UINT_MAX and GENMASK(31, 0). Use the former as the single way of
doing that, which is crystal clear on how we fill the unsigned int
value.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Link: https://patch.msgid.link/20250206191644.1132869-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>regmap-irq: Add missing kfree()</title>
<updated>2025-02-05T11:55:42Z</updated>
<author>
<name>Jiasheng Jiang</name>
<email>jiashengjiangcool@gmail.com</email>
</author>
<published>2025-02-05T00:43:43Z</published>
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<id>urn:sha1:32ffed055dcee17f6705f545b069e44a66067808</id>
<content type='text'>
Add kfree() for "d-&gt;main_status_buf" to the error-handling path to prevent
a memory leak.

Fixes: a2d21848d921 ("regmap: regmap-irq: Add main status register support")
Cc: stable@vger.kernel.org  # v5.1+
Signed-off-by: Jiasheng Jiang &lt;jiashengjiangcool@gmail.com&gt;
Link: https://patch.msgid.link/20250205004343.14413-1-jiashengjiangcool@gmail.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>regmap: Reorder 'struct regmap'</title>
<updated>2025-02-03T00:38:32Z</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2025-01-24T13:37:58Z</published>
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<id>urn:sha1:995cf0e014b0144edf1125668a97c252c5ab775e</id>
<content type='text'>
On a x86_64, with configured with allmodconfig, pahole states that the
regmap structure is:

	/* size: 1048, cachelines: 17, members: 78 */
	/* sum members: 1006, holes: 9, sum holes: 35 */
	/* padding: 7 */
	/* member types with holes: 2, total: 2 */
	/* last cacheline: 24 bytes */

So, when such a struct is allocated, 2048 bytes are allocated, with most of
this space being wasted.

Move a few bools so that the size is reduced to 1024.

After this change, pahole gives:

	/* size: 1024, cachelines: 16, members: 78 */
	/* sum members: 1006, holes: 6, sum holes: 18 */
	/* member types with holes: 2, total: 2 */

Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Link: https://patch.msgid.link/f01f900d15633d5cda5f27763723acb307c0d22f.1737725820.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>Expand SoundWire MBQ register map support</title>
<updated>2025-01-07T23:28:07Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2025-01-07T23:28:07Z</published>
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<id>urn:sha1:d406b354df909155ff0122acf80f3bc7410fa27e</id>
<content type='text'>
Merge series from Charles Keepax &lt;ckeepax@opensource.cirrus.com&gt;:

The current SDCA MBQ (Multi-Byte Quantities) register map only
supports 16-bit types, add support for more sizes and then update
the rt722 driver to use the new support. We also add support for
the deferring feature of MBQs to allow hardware to indicate it is
not currently ready to service a read/write.

Afraid I don't have hardware to test the rt722 change so it is
only build tested, but I thought it good to include a change to
demonstrate the new features in use.
</content>
</entry>
<entry>
<title>regmap: sdw-mbq: Add support for SDCA deferred controls</title>
<updated>2025-01-07T20:21:00Z</updated>
<author>
<name>Charles Keepax</name>
<email>ckeepax@opensource.cirrus.com</email>
</author>
<published>2025-01-07T15:44:06Z</published>
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<id>urn:sha1:5bc493bf0c37c157bf2eb364e55a1c6f8bc43a69</id>
<content type='text'>
The SDCA specification allows for controls to be deferred. In the case
of a deferred control the device will return COMMAND_IGNORED to the
8-bit operation that would cause the value to commit. Which is the
final 8-bits on a write, or the first 8-bits on a read. In the case of
receiving a defer, the regmap will poll the SDCA function busy bit,
after which the transaction will be retried, returning an error if the
function busy does not clear within a chip specific timeout. Since
this is common SDCA functionality which is the 99% use-case for MBQs
it makes sense to incorporate this functionality into the register
map. If no MBQ configuration is specified, the behaviour will default
to the existing behaviour.

Signed-off-by: Charles Keepax &lt;ckeepax@opensource.cirrus.com&gt;
Link: https://patch.msgid.link/20250107154408.814455-5-ckeepax@opensource.cirrus.com
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.dev&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>regmap: sdw-mbq: Add support for further MBQ register sizes</title>
<updated>2025-01-07T20:20:59Z</updated>
<author>
<name>Charles Keepax</name>
<email>ckeepax@opensource.cirrus.com</email>
</author>
<published>2025-01-07T15:44:05Z</published>
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<id>urn:sha1:fdd9ef3dce98e035d21c17fac587cb6e3c7706fd</id>
<content type='text'>
SoundWire MBQ register maps typically contain a variety of register
sizes, which doesn't map ideally to the regmap abstraction which
expects register maps to have a consistent size. Currently the MBQ
register map only allows 16-bit registers to be defined, however
this leads to complex CODEC driver implementations with an 8-bit
register map and a 16-bit MBQ, every control will then have a custom
get and put handler that allows them to access different register
maps. Further more 32-bit MBQ quantities are not currently supported.

Add support for additional MBQ sizes and to avoid the complexity
of multiple register maps treat the val_size as a maximum size for
the register map. Within the regmap use an ancillary callback to
determine how many bytes to actually read/write to the hardware for
a specific register. In the case that no callback is defined the
behaviour defaults back to the existing behaviour of a fixed size
register map.

Signed-off-by: Charles Keepax &lt;ckeepax@opensource.cirrus.com&gt;
Link: https://patch.msgid.link/20250107154408.814455-4-ckeepax@opensource.cirrus.com
Reviewed-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.dev&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>regmap: regmap_multi_reg_read(): make register list const</title>
<updated>2024-12-11T14:24:09Z</updated>
<author>
<name>Richard Fitzgerald</name>
<email>rf@opensource.cirrus.com</email>
</author>
<published>2024-12-11T13:35:58Z</published>
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<id>urn:sha1:eb708cd631a8dca17ff004ccc39bbeb096c1db22</id>
<content type='text'>
Mark the list of registers passed into regmap_multi_reg_read() as a
pointer to const. This allows the caller to define the register list
as const data.

This requires making the same change to _regmap_bulk_read(), which is
called by regmap_multi_reg_read().

Signed-off-by: Richard Fitzgerald &lt;rf@opensource.cirrus.com&gt;
Link: https://patch.msgid.link/20241211133558.884669-1-rf@opensource.cirrus.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>regmap: Merge up v6.12-rc2</title>
<updated>2024-12-09T12:50:45Z</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2024-12-09T12:50:45Z</published>
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<id>urn:sha1:1331fb6640440f42a709eafd5c802f3496f746b8</id>
<content type='text'>
This has fixes for several boards which help my testing a lot.
</content>
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