user/sven/linux.git/drivers/clk/mediatek, branch v4.9.2

clk: mediatek: Add hardware dependency

2016-10-17T22:22:26Z

Only propose the mediatek clock drivers on this platform, unless build-testing. Signed-off-by: Jean Delvare Cc: Shunli Wang Cc: James Liao Cc: Erin Lo Cc: Matthias Brugger Cc: Michael Turquette Reviewed-by: Matthias Brugger Signed-off-by: Stephen Boyd

clk: mediatek: clk-mt8173: Unmap region obtained by of_iomap

2016-09-21T08:06:07Z

Free memory mapping if init is not successful. Signed-off-by: Arvind Yadav Reviewed-by: James Liao Signed-off-by: Stephen Boyd

clk: mediatek: Refine the makefile to support multiple clock drivers

2016-08-19T19:18:38Z

Add a Kconfig to define clock configuration for each SoC, and modify the Makefile to build drivers that only selected in config. Signed-off-by: Shunli Wang Signed-off-by: James Liao Signed-off-by: Erin Lo Tested-by: John Crispin Reviewed-by: Matthias Brugger Signed-off-by: Stephen Boyd

clk: mediatek: remove __init from clk registration functions

2016-08-19T00:15:30Z

Remove __init from functions that will be used by init functions that support probe deferral. Signed-off-by: James Liao Signed-off-by: Erin Lo Signed-off-by: Stephen Boyd

clk: mediatek: remove hdmitx_dig_cts from TOP clocks

2016-05-06T15:47:42Z

The hdmitx_dig_cts clock signal is not a child of tvdpll_445p5m, but is routed out of the HDMI PHY module. Signed-off-by: Philipp Zabel Acked-by: Stephen Boyd

clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

2016-05-06T15:47:40Z

The configurable hdmi_ref output of the PLL block is derived from the tvdpll_594m clock signal via a configurable PLL post-divider. It is used as the PLL reference input to the HDMI PHY module. Signed-off-by: Philipp Zabel Acked-by: James Liao Acked-by: Stephen Boyd

clk: mediatek: make dpi0_sel propagate rate changes

2016-05-06T15:47:39Z

This mux is supposed to select a fitting divider after the PLL is already set to the correct rate. Signed-off-by: Philipp Zabel Acked-by: James Liao Acked-by: Stephen Boyd

clk: mediatek: Make reset_control_ops const

2016-03-29T23:29:19Z

The mtk_reset_ops structure is never modified. Make it const. Signed-off-by: Philipp Zabel Reviewed-by: Matthias Brugger Signed-off-by: Stephen Boyd

clk: mediatek: Remove CLK_IS_ROOT

2016-03-03T01:44:06Z

This flag is a no-op now. Remove usage of the flag. Acked-by: James Liao Signed-off-by: Stephen Boyd

clk: mediatek: Fix memory leak on clock init fail

2016-01-29T21:02:51Z

mtk_clk_register_composite() may leak memory due to some error handling path don't free all allocated memory. This patch free all pointers that may allocate memory before error return. And it's safe because kfree() can handle NULL pointers. Signed-off-by: James Liao Reviewed-by: Daniel Kurtz Signed-off-by: Stephen Boyd