user/sven/linux.git/drivers/clocksource/timer-sp804.c, branch v6.0-rc2

clocksource/drivers/sp804: Avoid error on multiple instances

2022-05-18T09:08:52Z

When a machine sports more than one SP804 timer instance, we only bring up the first one, since multiple timers of the same kind are not useful to Linux. As this is intentional behaviour, we should not return an error message, as we do today: =============== [ 0.000800] Failed to initialize '/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/timer@120000': -22 =============== Replace the -EINVAL return with a debug message and return 0 instead. Also we do not reach the init function anymore if the DT node is disabled (as this is now handled by OF_DECLARE), so remove the explicit check for that case. This fixes a long standing bogus error when booting ARM's fastmodels. Signed-off-by: Andre Przywara Reviewed-by: Robin Murphy Link: https://lore.kernel.org/r/20220506162522.3675399-1-andre.przywara@arm.com Signed-off-by: Daniel Lezcano

clocksource/drivers/sp804: Use pr_fmt

2020-12-03T18:16:18Z

Add pr_fmt to prefix pr_ output. Signed-off-by: Kefeng Wang Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20201029123317.90286-5-wangkefeng.wang@huawei.com

clocksource/drivers/sp804: Correct clk_get_rate handle

2020-12-03T18:16:17Z

clk_get_rate won't return negative value, correct clk_get_rate handle. Signed-off-by: Kefeng Wang Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20201029123317.90286-4-wangkefeng.wang@huawei.com

clocksource/drivers/sp804: Use clk_prepare_enable and clk_disable_unprepare

2020-12-03T18:16:17Z

Directly use clk_prepare_enable and clk_disable_unprepare. Signed-off-by: Kefeng Wang Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20201029123317.90286-3-wangkefeng.wang@huawei.com

clocksource/drivers/sp804: Make some symbol static

2020-12-03T18:16:17Z

drivers/clocksource/timer-sp804.c:38:31: warning: symbol 'arm_sp804_timer' was not declared. Should it be static? drivers/clocksource/timer-sp804.c:47:31: warning: symbol 'hisi_sp804_timer' was not declared. Should it be static? drivers/clocksource/timer-sp804.c:120:12: warning: symbol 'sp804_clocksource_and_sched_clock_init' was not declared. Should it be static? drivers/clocksource/timer-sp804.c:219:12: warning: symbol 'sp804_clockevents_init' was not declared. Should it be static? And move __initdata after the variables. Signed-off-by: Kefeng Wang Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20201029123317.90286-2-wangkefeng.wang@huawei.com

clocksource/drivers/sp804: Add static for functions such as sp804_clockevents_init()

2020-12-03T18:16:09Z

Add static for sp804_clocksource_and_sched_clock_init() and sp804_clockevents_init(), they are only used in timer-sp804.c now. Otherwise, the following warning will be reported: drivers/clocksource/timer-sp804.c:68:12: warning: no previous prototype \ for 'sp804_clocksource_and_sched_clock_init' [-Wmissing-prototypes] drivers/clocksource/timer-sp804.c:162:12: warning: no previous prototype \ for 'sp804_clockevents_init' [-Wmissing-prototypes] Fixes: 975434f8b24a ("clocksource/drivers/sp804: Delete the leading "__" of some functions") Fixes: 65f4d7ddc7b6 ("clocksource/drivers/sp804: Remove unused sp804_timer_disable() and timer-sp804.h") Reported-by: kernel test robot Signed-off-by: Zhen Lei Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20201021012259.2067-2-thunder.leizhen@huawei.com

clocksource/drivers/sp804: Enable Hisilicon sp804 timer 64bit mode

2020-09-24T08:51:04Z

A 100MHZ 32-bit timer will be wrapped up less than 43s. Although the kernel maintains a software high 32-bit count in the tick IRQ. But it's not applicable to the user mode APPs. Note: The kernel still uses the lower 32 bits of the timer. Signed-off-by: Zhen Lei Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200918132237.3552-9-thunder.leizhen@huawei.com

clocksource/drivers/sp804: Add support for Hisilicon sp804 timer

2020-09-24T08:51:04Z

clocksource/drivers/sp804: Support non-standard register offset

2020-09-24T08:51:04Z

The ARM SP804 supports a maximum of 32-bit counter, but Hisilicon extends it to 64-bit. That means, the registers: TimerXload, TimerXValue and TimerXBGLoad are 64bits, all other registers are the same as those in the SP804. The driver code can be completely reused except that the register offset is different. Currently, we get a timer register address by: add the constant register offset to the timer base address. e.g. "base + TIMER_CTRL". It can not be dynamically adjusted at run time. So create a new structure "sp804_timer" to record the original registers offset, and create a new structure "sp804_clkevt" to record the calculated registers address. So the "base + TIMER_CTRL" is changed to "clkevt->ctrl", this will faster than "base + timer->ctrl". For example: struct sp804_timer arm_sp804_timer = { .ctrl = TIMER_CTRL, }; struct sp804_clkevt clkevt; clkevt.ctrl = base + arm_sp804_timer.ctrl. - writel(0, base + TIMER_CTRL); + writel(0, clkevt->ctrl); Signed-off-by: Zhen Lei Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200918132237.3552-7-thunder.leizhen@huawei.com

clocksource/drivers/sp804: Prepare for support non-standard register offset

2020-09-24T08:51:04Z

Add two local variables: timer1_base and timer2_base in sp804_of_init(), to avoid repeatedly calculate the base address of timer2, and make it easier to recognize timer1. Hope to make the next patch looks more clear. No functional change. Signed-off-by: Zhen Lei Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200918132237.3552-6-thunder.leizhen@huawei.com