<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/cpuidle, branch v5.7</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.7</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.7'/>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/'/>
<updated>2020-04-10T09:32:22Z</updated>
<entry>
<title>Merge branch 'pm-cpuidle'</title>
<updated>2020-04-10T09:32:22Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2020-04-10T09:32:22Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=a31434bcd4cb73b13cd8136c3cbba966dd01f058'/>
<id>urn:sha1:a31434bcd4cb73b13cd8136c3cbba966dd01f058</id>
<content type='text'>
* pm-cpuidle:
  cpuidle-haltpoll: Fix small typo
</content>
</entry>
<entry>
<title>cpuidle-haltpoll: Fix small typo</title>
<updated>2020-04-08T12:35:45Z</updated>
<author>
<name>Yihao Wu</name>
<email>wuyihao@linux.alibaba.com</email>
</author>
<published>2020-04-08T10:11:36Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=4902f7fcb3bcb4ce088db97bfd194401a784cc60'/>
<id>urn:sha1:4902f7fcb3bcb4ce088db97bfd194401a784cc60</id>
<content type='text'>
Fix a spelling typo in cpuidle-haltpoll.c.

Signed-off-by: Yihao Wu &lt;wuyihao@linux.alibaba.com&gt;
[ rjw: Subject &amp; changelog ]
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2020-04-03T22:02:35Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-04-03T22:02:35Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=0e8fb69f287bcf61fb93990f6bb1496ef0122499'/>
<id>urn:sha1:0e8fb69f287bcf61fb93990f6bb1496ef0122499</id>
<content type='text'>
Pull ARM SoC updates from Arnd Bergmann:
 "The code changes are mostly for 32-bit platforms and include:

   - Lots of updates for the Nvidia Tegra platform, including cpuidle,
     pmc, and dt-binding changes

   - Microchip at91 power management updates for the recently added
     sam9x60 SoC

   - Treewide setup_irq deprecation by afzal mohammed

   - STMicroelectronics stm32 gains earlycon support

   - Renesas platforms with Cortex-A9 can now use the global timer

   - Some TI OMAP2+ platforms gain cpuidle support

   - Various cleanups for the i.MX6 and Orion platforms, as well as
     Kconfig files across all platforms"

* tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits)
  ARM: qcom: Add support for IPQ40xx
  ARM: mmp: replace setup_irq() by request_irq()
  ARM: cns3xxx: replace setup_irq() by request_irq()
  ARM: spear: replace setup_irq() by request_irq()
  ARM: ep93xx: Replace setup_irq() by request_irq()
  ARM: iop32x: replace setup_irq() by request_irq()
  arm: mach-dove: Mark dove_io_desc as __maybe_unused
  ARM: orion: replace setup_irq() by request_irq()
  ARM: debug: stm32: add UART early console support for STM32MP1
  ARM: debug: stm32: add UART early console support for STM32H7
  ARM: debug: stm32: add UART early console configuration for STM32F7
  ARM: debug: stm32: add UART early console configuration for STM32F4
  cpuidle: tegra: Disable CC6 state if LP2 unavailable
  cpuidle: tegra: Squash Tegra114 driver into the common driver
  cpuidle: tegra: Squash Tegra30 driver into the common driver
  cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
  ARM: tegra: cpuidle: Remove unnecessary memory barrier
  ARM: tegra: cpuidle: Make abort_flag atomic
  ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
  ARM: tegra: Make outer_disable() open-coded
  ...
</content>
</entry>
<entry>
<title>Merge branches 'pm-core', 'pm-sleep', 'pm-acpi' and 'pm-domains'</title>
<updated>2020-03-30T12:46:58Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2020-03-30T12:46:58Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=ada0629bd3135504680fc787cb4dc79f43ff4441'/>
<id>urn:sha1:ada0629bd3135504680fc787cb4dc79f43ff4441</id>
<content type='text'>
* pm-core:
  PM: runtime: Add pm_runtime_get_if_active()

* pm-sleep:
  PM: sleep: wakeup: Skip wakeup_source_sysfs_remove() if device is not there
  PM / hibernate: Remove unnecessary compat ioctl overrides
  PM: hibernate: fix docs for ioctls that return loff_t via pointer
  PM: sleep: wakeup: Use built-in RCU list checking
  PM: sleep: core: Use built-in RCU list checking

* pm-acpi:
  ACPI: PM: s2idle: Refine active GPEs check
  ACPICA: Allow acpi_any_gpe_status_set() to skip one GPE
  ACPI: PM: s2idle: Fix comment in acpi_s2idle_prepare_late()

* pm-domains:
  cpuidle: psci: Split psci_dt_cpu_init_idle()
  PM / Domains: Allow no domain-idle-states DT property in genpd when parsing
</content>
</entry>
<entry>
<title>Merge branch 'pm-cpuidle'</title>
<updated>2020-03-30T12:46:17Z</updated>
<author>
<name>Rafael J. Wysocki</name>
<email>rafael.j.wysocki@intel.com</email>
</author>
<published>2020-03-30T12:46:17Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=be4f65405a88d5261f8c8be1e0330ba62f3f1a51'/>
<id>urn:sha1:be4f65405a88d5261f8c8be1e0330ba62f3f1a51</id>
<content type='text'>
* pm-cpuidle:
  cpuidle: haltpoll: allow force loading on hosts without the REALTIME hint
  intel_idle: Update copyright notice, known limitations and version
  intel_idle: Define CPUIDLE_FLAG_TLB_FLUSHED as BIT(16)
  intel_idle: Clean up kerneldoc comments for multiple functions
  intel_idle: Reorder declarations of static variables
  intel_idle: Annotate init time data structures
  intel_idle: Add __initdata annotations to init time variables
  intel_idle: Relocate definitions of cpuidle callbacks
  intel_idle: Clean up definitions of cpuidle callbacks
  intel_idle: Simplify LAPIC timer reliability checks
</content>
</entry>
<entry>
<title>cpuidle: psci: Split psci_dt_cpu_init_idle()</title>
<updated>2020-03-14T11:03:05Z</updated>
<author>
<name>Ulf Hansson</name>
<email>ulf.hansson@linaro.org</email>
</author>
<published>2020-03-10T10:40:39Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=7fbee48ea0fb00976ea15db3a2103ef20005a54a'/>
<id>urn:sha1:7fbee48ea0fb00976ea15db3a2103ef20005a54a</id>
<content type='text'>
To make the code a bit more readable, let's move the OSI specific
initialization out of the psci_dt_cpu_init_idle() and into a separate
function.

Reviewed-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>cpuidle: haltpoll: allow force loading on hosts without the REALTIME hint</title>
<updated>2020-03-14T10:39:07Z</updated>
<author>
<name>Maciej S. Szmigiero</name>
<email>maciej.szmigiero@oracle.com</email>
</author>
<published>2020-03-04T11:32:48Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=dd52551fb786aa7371bf9fe922573deafc26287e'/>
<id>urn:sha1:dd52551fb786aa7371bf9fe922573deafc26287e</id>
<content type='text'>
Before commit 1328edca4a14 ("cpuidle-haltpoll: Enable kvm guest polling
when dedicated physical CPUs are available") the cpuidle-haltpoll driver
could also be used in scenarios when the host does not advertise the
KVM_HINTS_REALTIME hint.

While the behavior introduced by the aforementioned commit makes sense as
the default there are cases where the old behavior is desired, for example,
when other kernel changes triggered by presence by this hint are unwanted,
for some workloads where the latency benefit from polling overweights the
loss from idle CPU capacity that otherwise would be available, or just when
running under older Qemu versions that lack this hint.

Let's provide a typical "force" module parameter that allows restoring the
old behavior.

Signed-off-by: Maciej S. Szmigiero &lt;maciej.szmigiero@oracle.com&gt;
Reviewed-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>cpuidle: tegra: Disable CC6 state if LP2 unavailable</title>
<updated>2020-03-13T10:32:01Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2020-02-24T22:40:55Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=382ac8e22b90e6334d373da03c17b319458b258e'/>
<id>urn:sha1:382ac8e22b90e6334d373da03c17b319458b258e</id>
<content type='text'>
LP2 suspending could be unavailable, for example if it is disabled in a
device-tree. CC6 cpuidle state won't work in that case.

Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>cpuidle: tegra: Squash Tegra114 driver into the common driver</title>
<updated>2020-03-13T10:32:01Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2020-02-24T22:40:54Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=14e086baca509ef244715ad8b6c3f7bf80621e0b'/>
<id>urn:sha1:14e086baca509ef244715ad8b6c3f7bf80621e0b</id>
<content type='text'>
Tegra20/30/114/124 SoCs have common idling states, thus there is no much
point in having separate drivers for a similar hardware. This patch moves
Tegra114/124 arch/ drivers into the common driver without any functional
changes. The CC6 state is kept disabled on Tegra114/124 because the core
Tegra PM code needs some more work in order to support that state.

Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>cpuidle: tegra: Squash Tegra30 driver into the common driver</title>
<updated>2020-03-13T10:32:01Z</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2020-02-24T22:40:53Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=19461a499c9e47d38f29e1ec4f0f614197cd67f2'/>
<id>urn:sha1:19461a499c9e47d38f29e1ec4f0f614197cd67f2</id>
<content type='text'>
Tegra20 and Terga30 SoCs have common C1 and CC6 idling states and thus
share the same code paths, there is no point in having separate drivers
for a similar hardware. This patch merely moves functionality of the old
driver into the new, although the CC6 state is kept disabled for now since
old driver had a rudimentary support for this state (allowing to enter
into CC6 only when secondary CPUs are put offline), while new driver can
provide a full-featured support. The new feature will be enabled by
another patch.

Acked-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Tested-by: Peter Geis &lt;pgwipeout@gmail.com&gt;
Tested-by: Jasper Korten &lt;jja2000@gmail.com&gt;
Tested-by: David Heidelberg &lt;david@ixit.cz&gt;
Tested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
