user/sven/linux.git/drivers/crypto/Makefile, branch v4.9.203

crypto: Added Chelsio Menu to the Kconfig file

2016-08-19T07:00:37Z

Adds the config entry for the Chelsio Crypto Driver, Makefile changes for the same. Signed-off-by: Atul Gupta Signed-off-by: Hariprasad Shenai Signed-off-by: David S. Miller

crypto: mxc-scc - add basic driver for the MXC SCC

2016-04-15T14:36:35Z

According to the Freescale GPL driver code, there are two different Security Controller (SCC) versions: SCC and SCC2. The SCC is found on older i.MX SoCs, e.g. the i.MX25. This is the version implemented and tested here. As there is no publicly available documentation for this IP core, all information about this unit is gathered from the GPL'ed driver from Freescale. Signed-off-by: Steffen Trumtrar Signed-off-by: Herbert Xu

crypto: rockchip - add crypto driver for rk3288

2015-11-27T13:19:32Z

Crypto driver support: ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede) You can alloc tags above in your case. And other algorithms and platforms will be added later on. Signed-off-by: Zain Wang Tested-by: Heiko Stuebner Signed-off-by: Herbert Xu

crypto: sunxi-ss - Add Allwinner Security System crypto accelerator

2015-07-20T07:54:08Z

Add support for the Security System included in Allwinner SoC A20. The Security System is a hardware cryptographic accelerator that support: - MD5 and SHA1 hash algorithms - AES block cipher in CBC/ECB mode with 128/196/256bits keys. - DES and 3DES block cipher in CBC/ECB mode Signed-off-by: LABBE Corentin Signed-off-by: Herbert Xu

crypto: marvell/cesa - add a new driver for Marvell's CESA

2015-06-19T14:18:03Z

The existing mv_cesa driver supports some features of the CESA IP but is quite limited, and reworking it to support new features (like involving the TDMA engine to offload the CPU) is almost impossible. This driver has been rewritten from scratch to take those new features into account. This commit introduce the base infrastructure allowing us to add support for DMA optimization. It also includes support for one hash (SHA1) and one cipher (AES) algorithm, and enable those features on the Armada 370 SoC. Other algorithms and platforms will be added later on. Signed-off-by: Boris Brezillon Signed-off-by: Arnaud Ebalard Signed-off-by: Herbert Xu

crypto: img-hash - Add Imagination Technologies hw hash accelerator

2015-03-16T10:46:24Z

This adds support for the Imagination Technologies hash accelerator which provides hardware acceleration for SHA1 SHA224 SHA256 and MD5 hashes. Signed-off-by: James Hartley Reviewed-by: Andrew Bresticker Signed-off-by: Herbert Xu

crypto: vmx - Enabling VMX module for PPC64

2015-02-28T10:13:46Z

This patch enables VMX module in PPC64. Signed-off-by: Leonidas S. Barbosa Signed-off-by: Herbert Xu

crypto: qce - Build Qualcomm crypto driver

2014-07-03T13:42:03Z

Modify crypto Kconfig and Makefile in order to build the qce driver and adds qce Makefile as well. Signed-off-by: Stanimir Varbanov Signed-off-by: Herbert Xu

crypto: qat - Update to makefiles

2014-06-20T13:26:19Z

Update to makefiles etc. Don't update the firmware/Makefile yet since there is no FW binary in the crypto repo yet. This will be added later. v3 - removed change to ./firmware/Makefile Reviewed-by: Bruce W. Allan Signed-off-by: Tadeusz Struk Signed-off-by: Herbert Xu

crypto: tegra - remove driver

2014-02-26T21:56:57Z

This driver has never been hooked up in any board file, and cannot be instantiated via device tree. I've been told that, at least on Tegra20, the HW is slower at crypto than the main CPU. I have no test-case for it. Hence, remove it. Cc: Varun Wadekar Signed-off-by: Stephen Warren Signed-off-by: Herbert Xu