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<title>user/sven/linux.git/drivers/crypto/inside-secure, branch v5.4.3</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.4.3</id>
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<updated>2019-12-04T21:30:44Z</updated>
<entry>
<title>crypto: inside-secure - Fix stability issue with Macchiatobin</title>
<updated>2019-12-04T21:30:44Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-09-17T09:55:18Z</published>
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<id>urn:sha1:f3cda1dea7f069a0fc0b2fbe3cee3e2821ff6498</id>
<content type='text'>
commit b8c5d882c8334d05754b69dcdf1cfd6bc48a9e12 upstream.

This patch corrects an error in the Transform Record Cache initialization
code that was causing intermittent stability problems on the Macchiatobin
board.

Unfortunately, due to HW platform specifics, the problem could not happen
on the main development platform, being the VCU118 Xilinx development
board. And since it was a problem with hash table access, it was very
dependent on the actual physical context record DMA buffers being used,
i.e. with some (bad) luck it could seemingly work quit stable for a while.

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>crypto: inside-secure - Fix unused variable warning when CONFIG_PCI=n</title>
<updated>2019-09-20T12:53:09Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-09-13T09:04:40Z</published>
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<id>urn:sha1:212ef6f29e5b82bfd0ff595347fa1643326589a0</id>
<content type='text'>
This patch fixes an unused variable warning from the compiler when the
driver is being compiled without PCI support in the kernel.

Fixes: 625f269a5a7a ("crypto: inside-secure - add support for...")
Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: inside-secure - Probe transform record cache RAM sizes</title>
<updated>2019-09-13T11:17:58Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-09-06T14:31:53Z</published>
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<id>urn:sha1:465527bcaebc1dcecc77b78ff77936658384152e</id>
<content type='text'>
This patch actually probes the transform record cache data and
administration RAM sizes, instead of making assumptions, and then
configures the TRC based on the actually probed values.
This allows the driver to work with EIP197 HW that has TRC RAM
sizes different from those of the Marvell EIP197B/D variants.

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: inside-secure - Base RD fetchcount on actual RD FIFO size</title>
<updated>2019-09-13T11:17:58Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-09-06T14:31:52Z</published>
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<id>urn:sha1:b2d92ac1c5eebcb0510939edfdfc2e87330f6679</id>
<content type='text'>
This patch derives the result descriptor fetch count from the actual
FIFO size advertised by the hardware. Fetching result descriptors
one at a time is a performance bottleneck for small blocks, especially
on hardware with multiple pipes. Even moreso if the HW has few rings.

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: inside-secure - Base CD fetchcount on actual CD FIFO size</title>
<updated>2019-09-13T11:17:58Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-09-06T14:31:51Z</published>
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<id>urn:sha1:35c0e6c375ac7a09d1b099ceea101a2258857afa</id>
<content type='text'>
This patch derives the command descriptor fetch count from the actual
FIFO size advertised by the hardware. Fetching command descriptors
one at a time is a performance bottleneck for small blocks, especially
on hardware with multiple pipes. Even moreso if the HW has few rings.

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: inside-secure - Enable extended algorithms on newer HW</title>
<updated>2019-09-13T11:17:58Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-09-06T14:31:50Z</published>
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<id>urn:sha1:4bdf712c3049ea10e2a01031b364b85bad2cb6d4</id>
<content type='text'>
This patch enables algorithms that did not fit the original 32 bit
FUNCTION_EN register anymore via the FUNCTION2_EN extension reg.

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: inside-secure: Corrected configuration of EIP96_TOKEN_CTRL</title>
<updated>2019-09-13T11:17:57Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-09-06T14:31:49Z</published>
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<id>urn:sha1:f9d131d983673e7d2e79dea695c6cd129e929d09</id>
<content type='text'>
This patch corrects the configuration of the EIP197_PE_EIP96_TOKEN_CTRL
register. Previous value was wrong and potentially dangerous.

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: inside-secure - Add EIP97/EIP197 and endianness detection</title>
<updated>2019-09-13T11:17:57Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-09-06T14:31:48Z</published>
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<id>urn:sha1:118db42deeeff1cac3fe5f23f5c3ac25d6a77b7d</id>
<content type='text'>
This patch adds automatic EIP97/EIP197 detection, so it does not need to
rely on any static value from the device table anymore. In particular,
the static value from the table won't work for PCI devboards that cannot
be further identified save from this direct hardware probing.

The patch also adds automatic host xs endianness detection &amp; correction.

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: inside-secure - Added support for basic AES-CCM</title>
<updated>2019-09-05T04:37:30Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-08-30T07:52:33Z</published>
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<id>urn:sha1:4eb76faff89f29d3b729953007b963b39b2048be</id>
<content type='text'>
This patch adds support for the basic AES-CCM AEAD cipher suite.

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: inside-secure - Added AES-OFB support</title>
<updated>2019-09-05T04:37:29Z</updated>
<author>
<name>Pascal van Leeuwen</name>
<email>pascalvanl@gmail.com</email>
</author>
<published>2019-08-30T07:52:32Z</published>
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<id>urn:sha1:50485dfb6c60f63e1a42943a910c0ab670c92a25</id>
<content type='text'>
This patch adds support for AES in output feedback mode (AES-OFB).

Signed-off-by: Pascal van Leeuwen &lt;pvanleeuwen@verimatrix.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
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