<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/crypto/qce, branch v5.10.167</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2022-01-27T09:53:49Z</updated>
<entry>
<title>crypto: qce - fix uaf on qce_skcipher_register_one</title>
<updated>2022-01-27T09:53:49Z</updated>
<author>
<name>Chengfeng Ye</name>
<email>cyeaa@connect.ust.hk</email>
</author>
<published>2021-11-04T13:46:42Z</published>
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<id>urn:sha1:867d4ace48da2c117bed8599efa23456378bf8f5</id>
<content type='text'>
[ Upstream commit e9c195aaeed1b45c9012adbe29dedb6031e85aa8 ]

Pointer alg points to sub field of tmpl, it
is dereferenced after tmpl is freed. Fix
this by accessing alg before free tmpl.

Fixes: ec8f5d8f ("crypto: qce - Qualcomm crypto engine driver")
Signed-off-by: Chengfeng Ye &lt;cyeaa@connect.ust.hk&gt;
Acked-by: Thara Gopinath &lt;thara.gopinath@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>crypto: qce - fix uaf on qce_ahash_register_one</title>
<updated>2022-01-27T09:53:49Z</updated>
<author>
<name>Chengfeng Ye</name>
<email>cyeaa@connect.ust.hk</email>
</author>
<published>2021-11-04T13:38:31Z</published>
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<id>urn:sha1:e19b3c1b5768f0e2eccc7c9eb7ccaf938be2af11</id>
<content type='text'>
[ Upstream commit b4cb4d31631912842eb7dce02b4350cbb7562d5e ]

Pointer base points to sub field of tmpl, it
is dereferenced after tmpl is freed. Fix
this by accessing base before free tmpl.

Fixes: ec8f5d8f ("crypto: qce - Qualcomm crypto engine driver")
Signed-off-by: Chengfeng Ye &lt;cyeaa@connect.ust.hk&gt;
Acked-by: Thara Gopinath &lt;thara.gopinath@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>crypto: qce - fix error return code in qce_skcipher_async_req_handle()</title>
<updated>2021-07-14T14:56:54Z</updated>
<author>
<name>Wei Yongjun</name>
<email>weiyongjun1@huawei.com</email>
</author>
<published>2021-06-02T11:36:45Z</published>
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<id>urn:sha1:e4a577d617914293ece95b74c51530327f53bd2a</id>
<content type='text'>
commit a8bc4f5e7a72e4067f5afd7e98b61624231713ca upstream.

Fix to return a negative error code from the error handling
case instead of 0, as done elsewhere in this function.

Fixes: 1339a7c3ba05 ("crypto: qce: skcipher: Fix incorrect sg count for dma transfers")
Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Reviewed-by: Thara Gopinath &lt;thara.gopinath@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>crypto: qce: skcipher: Fix incorrect sg count for dma transfers</title>
<updated>2021-07-14T14:55:52Z</updated>
<author>
<name>Thara Gopinath</name>
<email>thara.gopinath@linaro.org</email>
</author>
<published>2021-05-21T02:20:23Z</published>
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<id>urn:sha1:addcb6bb584aef558ecab13c45bec0cd1bc3efb3</id>
<content type='text'>
[ Upstream commit 1339a7c3ba05137a2d2fe75f602311bbfc6fab33 ]

Use the sg count returned by dma_map_sg to call into
dmaengine_prep_slave_sg rather than using the original sg count. dma_map_sg
can merge consecutive sglist entries, thus making the original sg count
wrong. This is a fix for memory coruption issues observed while testing
encryption/decryption of large messages using libkcapi framework.

Patch has been tested further by running full suite of tcrypt.ko tests
including fuzz tests.

Signed-off-by: Thara Gopinath &lt;thara.gopinath@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>crypto: algapi - Remove skbuff.h inclusion</title>
<updated>2020-08-20T04:04:28Z</updated>
<author>
<name>Herbert Xu</name>
<email>herbert@gondor.apana.org.au</email>
</author>
<published>2020-08-19T11:58:20Z</published>
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<id>urn:sha1:0c3dc787a62aef3ca7aedf3797ec42fff9b0a913</id>
<content type='text'>
The header file algapi.h includes skbuff.h unnecessarily since
all we need is a forward declaration for struct sk_buff.  This
patch removes that inclusion.

Unfortunately skbuff.h pulls in a lot of things and drivers over
the years have come to rely on it so this patch adds a lot of
missing inclusions that result from this.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: drivers - set the flag CRYPTO_ALG_ALLOCATES_MEMORY</title>
<updated>2020-07-16T11:49:10Z</updated>
<author>
<name>Mikulas Patocka</name>
<email>mpatocka@redhat.com</email>
</author>
<published>2020-07-10T06:20:41Z</published>
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<id>urn:sha1:b8aa7dc5c7535f9abfca4bceb0ade9ee10cf5f54</id>
<content type='text'>
Set the flag CRYPTO_ALG_ALLOCATES_MEMORY in the crypto drivers that
allocate memory.

drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c: sun8i_ce_cipher
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c: sun8i_ss_cipher
drivers/crypto/amlogic/amlogic-gxl-core.c: meson_cipher
drivers/crypto/axis/artpec6_crypto.c: artpec6_crypto_common_init
drivers/crypto/bcm/cipher.c: spu_skcipher_rx_sg_create
drivers/crypto/caam/caamalg.c: aead_edesc_alloc
drivers/crypto/caam/caamalg_qi.c: aead_edesc_alloc
drivers/crypto/caam/caamalg_qi2.c: aead_edesc_alloc
drivers/crypto/caam/caamhash.c: hash_digest_key
drivers/crypto/cavium/cpt/cptvf_algs.c: process_request
drivers/crypto/cavium/nitrox/nitrox_aead.c: nitrox_process_se_request
drivers/crypto/cavium/nitrox/nitrox_skcipher.c: nitrox_process_se_request
drivers/crypto/ccp/ccp-crypto-aes-cmac.c: ccp_do_cmac_update
drivers/crypto/ccp/ccp-crypto-aes-galois.c: ccp_crypto_enqueue_request
drivers/crypto/ccp/ccp-crypto-aes-xts.c: ccp_crypto_enqueue_request
drivers/crypto/ccp/ccp-crypto-aes.c: ccp_crypto_enqueue_request
drivers/crypto/ccp/ccp-crypto-des3.c: ccp_crypto_enqueue_request
drivers/crypto/ccp/ccp-crypto-sha.c: ccp_crypto_enqueue_request
drivers/crypto/chelsio/chcr_algo.c: create_cipher_wr
drivers/crypto/hisilicon/sec/sec_algs.c: sec_alloc_and_fill_hw_sgl
drivers/crypto/hisilicon/sec2/sec_crypto.c: sec_alloc_req_id
drivers/crypto/inside-secure/safexcel_cipher.c: safexcel_queue_req
drivers/crypto/inside-secure/safexcel_hash.c: safexcel_ahash_enqueue
drivers/crypto/ixp4xx_crypto.c: ablk_perform
drivers/crypto/marvell/cesa/cipher.c: mv_cesa_skcipher_dma_req_init
drivers/crypto/marvell/cesa/hash.c: mv_cesa_ahash_dma_req_init
drivers/crypto/marvell/octeontx/otx_cptvf_algs.c: create_ctx_hdr
drivers/crypto/n2_core.c: n2_compute_chunks
drivers/crypto/picoxcell_crypto.c: spacc_sg_to_ddt
drivers/crypto/qat/qat_common/qat_algs.c: qat_alg_skcipher_encrypt
drivers/crypto/qce/skcipher.c: qce_skcipher_async_req_handle
drivers/crypto/talitos.c : talitos_edesc_alloc
drivers/crypto/virtio/virtio_crypto_algs.c: __virtio_crypto_skcipher_do_req
drivers/crypto/xilinx/zynqmp-aes-gcm.c: zynqmp_aes_aead_cipher

Signed-off-by: Mikulas Patocka &lt;mpatocka@redhat.com&gt;
[EB: avoid overly-long lines]
Signed-off-by: Eric Biggers &lt;ebiggers@google.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: qce - permit asynchronous skcipher as fallback</title>
<updated>2020-07-16T11:49:03Z</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ardb@kernel.org</email>
</author>
<published>2020-07-07T06:32:01Z</published>
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<id>urn:sha1:90e2f782719fc5ad2af63096815a69c5320704cb</id>
<content type='text'>
Even though the qce driver implements asynchronous versions of ecb(aes),
cbc(aes)and xts(aes), the fallbacks it allocates are required to be
synchronous. Given that SIMD based software implementations are usually
asynchronous as well, even though they rarely complete asynchronously
(this typically only happens in cases where the request was made from
softirq context, while SIMD was already in use in the task context that
it interrupted), these implementations are disregarded, and either the
generic C version or another table based version implemented in assembler
is selected instead.

Since falling back to synchronous AES is not only a performance issue, but
potentially a security issue as well (due to the fact that table based AES
is not time invariant), let's fix this, by allocating an ordinary skcipher
as the fallback, and invoke it with the completion routine that was given
to the outer request.

While at it, remove the pointless memset() from qce_skcipher_init(), and
remove the call to it qce_skcipher_init_fallback().

Signed-off-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: qce/sha - Do not modify scatterlist passed along with request</title>
<updated>2020-07-03T04:18:34Z</updated>
<author>
<name>Sivaprakash Murugesan</name>
<email>sivaprak@codeaurora.org</email>
</author>
<published>2020-06-22T06:15:06Z</published>
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<id>urn:sha1:df12ef60c87b8fffc4d066dc6e553a77feaa6caf</id>
<content type='text'>
Crypto test driver's test_ahash_speed calls crypto_ahash_update and
crypto_ahash_final APIs repeatedly for all the available test vector
buffer lengths.

if we mark the end for scatterlist based on the current vector size then
the subsequent vectors might fail if the later buffer lengths are higher.

To avoid this, in qce do not mark the end of scatterlist in update API,
the qce_ahash_async_req_handle API already takes care of this copying
right amount of buffer from the request scatter list.

Signed-off-by: Sivaprakash Murugesan &lt;sivaprak@codeaurora.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: qce - re-initialize context on import</title>
<updated>2020-07-03T04:18:34Z</updated>
<author>
<name>Sivaprakash Murugesan</name>
<email>sivaprak@codeaurora.org</email>
</author>
<published>2020-06-22T06:15:05Z</published>
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<id>urn:sha1:a668ee56ff028139a0926e4d2248c9a573858ba0</id>
<content type='text'>
crypto testmgr deliberately corrupts the request context while passing
vectors to the import. This is to make sure that drivers do not rely on
request but they take all the necessary input from io vec passed to it.

qce casts the request context from request parameter, since it is corrupted
the sub squent hash request fails and qce hangs.

To avoid this re-initialize request context on import. The qce import
API alreasy takes care of taking the input vectors from passed io vec.

Signed-off-by: Sivaprakash Murugesan &lt;sivaprak@codeaurora.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: qce - support zero length test vectors</title>
<updated>2020-07-03T04:18:34Z</updated>
<author>
<name>Sivaprakash Murugesan</name>
<email>sivaprak@codeaurora.org</email>
</author>
<published>2020-06-22T06:15:04Z</published>
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<id>urn:sha1:8ac1b9ccbfbaeacc0c33433e3e7825593bda366e</id>
<content type='text'>
crypto test module passes zero length vectors as test input to sha-1 and
sha-256. To provide correct output for these vectors, hash zero support
has been added as in other crypto drivers.

Signed-off-by: Sivaprakash Murugesan &lt;sivaprak@codeaurora.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
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