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<title>user/sven/linux.git/drivers/dma/Makefile, branch v3.16.46</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v3.16.46</id>
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<updated>2014-04-30T05:14:13Z</updated>
<entry>
<title>dma: Add Xilinx AXI Video Direct Memory Access Engine driver support</title>
<updated>2014-04-30T05:14:13Z</updated>
<author>
<name>Srikanth Thokala</name>
<email>sthokal@xilinx.com</email>
</author>
<published>2014-04-23T14:53:26Z</published>
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<id>urn:sha1:9cd4360de6090a6daf7fbe024e34953f2ae60ef2</id>
<content type='text'>
This is the driver for the AXI Video Direct Memory Access (AXI
VDMA) core, which is a soft Xilinx IP core that provides high-
bandwidth direct memory access between memory and AXI4-Stream
type video target peripherals. The core provides efficient two
dimensional DMA operations with independent asynchronous read
and write channel operation.

This module works on Zynq (ARM Based SoC) and Microblaze platforms.

Signed-off-by: Srikanth Thokala &lt;sthokal@xilinx.com&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
Reviewed-by: Levente Kurusa &lt;levex@linux.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
</entry>
<entry>
<title>dmaengine: add Qualcomm BAM dma driver</title>
<updated>2014-04-05T15:14:26Z</updated>
<author>
<name>Andy Gross</name>
<email>agross@codeaurora.org</email>
</author>
<published>2014-03-29T13:23:16Z</published>
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<id>urn:sha1:e7c0fe2a5c84b7bf4dcbbce30953b04b95e9dc09</id>
<content type='text'>
Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller
found in the MSM 8x74 platforms.

Each BAM DMA device is associated with a specific on-chip peripheral.  Each
channel provides a uni-directional data transfer engine that is capable of
transferring data between the peripheral and system memory (System mode), or
between two peripherals (BAM2BAM).

The initial release of this driver only supports slave transfers between
peripherals and system memory.

Signed-off-by: Andy Gross &lt;agross@codeaurora.org&gt;
Tested-by: Stanimir Varbanov &lt;svarbanov@mm-sol.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
</entry>
<entry>
<title>dmaengine: Add MOXA ART DMA engine driver</title>
<updated>2014-01-20T07:02:46Z</updated>
<author>
<name>Jonas Jensen</name>
<email>jonas.jensen@gmail.com</email>
</author>
<published>2014-01-17T08:46:05Z</published>
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<id>urn:sha1:5f9e685a0d463666af080250b2ece11bc81acacd</id>
<content type='text'>
The MOXA ART SoC has a DMA controller capable of offloading expensive
memory operations, such as large copies. This patch adds support for
the controller including four channels. Two of these are used to
handle MMC copy on the UC-7112-LX hardware. The remaining two can be
used in a future audio driver or client application.

Signed-off-by: Jonas Jensen &lt;jonas.jensen@gmail.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
</entry>
<entry>
<title>dmaengine: Add support for BCM2835</title>
<updated>2014-01-07T16:06:39Z</updated>
<author>
<name>Florian Meier</name>
<email>florian.meier@koalo.de</email>
</author>
<published>2014-01-06T19:18:24Z</published>
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<id>urn:sha1:96286b57669073e81870e33a3e5ce476433d115f</id>
<content type='text'>
Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
Currently it only supports cyclic DMA.

Signed-off-by: Florian Meier &lt;florian.meier@koalo.de&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
</entry>
<entry>
<title>dmaengine: add driver for Samsung s3c24xx SoCs</title>
<updated>2013-10-07T21:42:10Z</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko@sntech.de</email>
</author>
<published>2013-10-07T21:42:10Z</published>
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<id>urn:sha1:ddeccb8d6b5bbe2c1e3a29f8c74b52f170c2207d</id>
<content type='text'>
This adds a new driver to support the s3c24xx dma using the dmaengine
and makes the old one in mach-s3c24xx obsolete in the long run.

Conceptually the s3c24xx-dma feels like a distant relative of the pl08x
with numerous virtual channels being mapped to a lot less physical ones.
The driver therefore borrows a lot from the amba-pl08x driver in this
regard. Functionality-wise the driver gains a memcpy ability in addition
to the slave_sg one.

The driver supports both the method for requesting the peripheral used
by SoCs before the S3C2443 and the different method for S3C2443 and later.

On earlier SoCs the hardware channels usable for specific peripherals is
constrainted while on later SoCs all channels can be used for any peripheral.

Tested on a s3c2416-based board, memcpy using the dmatest module and
slave_sg partially using the spi-s3c64xx driver.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma</title>
<updated>2013-09-10T20:37:36Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2013-09-10T20:37:36Z</published>
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<id>urn:sha1:ec5b103ecfde929004b691f29183255aeeadecd5</id>
<content type='text'>
Pull slave-dmaengine updates from Vinod Koul:
 "This pull brings:
   - Andy's DW driver updates
   - Guennadi's sh driver updates
   - Pl08x driver fixes from Tomasz &amp; Alban
   - Improvements to mmp_pdma by Daniel
   - TI EDMA fixes by Joel
   - New drivers:
     - Hisilicon k3dma driver
     - Renesas rcar dma driver
  - New API for publishing slave driver capablities
  - Various fixes across the subsystem by Andy, Jingoo, Sachin etc..."

* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (94 commits)
  dma: edma: Remove limits on number of slots
  dma: edma: Leave linked to Null slot instead of DUMMY slot
  dma: edma: Find missed events and issue them
  ARM: edma: Add function to manually trigger an EDMA channel
  dma: edma: Write out and handle MAX_NR_SG at a given time
  dma: edma: Setup parameters to DMA MAX_NR_SG at a time
  dmaengine: pl330: use dma_set_max_seg_size to set the sg limit
  dmaengine: dma_slave_caps: remove sg entries
  dma: replace devm_request_and_ioremap by devm_ioremap_resource
  dma: ste_dma40: Fix potential null pointer dereference
  dma: ste_dma40: Remove duplicate const
  dma: imx-dma: Remove redundant NULL check
  dma: dmagengine: fix function names in comments
  dma: add driver for R-Car HPB-DMAC
  dma: k3dma: use devm_ioremap_resource() instead of devm_request_and_ioremap()
  dma: imx-sdma: Staticize sdma_driver_data structures
  pch_dma: Add MODULE_DEVICE_TABLE
  dmaengine: PL08x: Add cyclic transfer support
  dmaengine: PL08x: Fix reading the byte count in cctl
  dmaengine: PL08x: Add support for different maximum transfer size
  ...
</content>
</entry>
<entry>
<title>dmaengine: Add hisilicon k3 DMA engine driver</title>
<updated>2013-08-28T05:53:40Z</updated>
<author>
<name>Zhangfei Gao</name>
<email>zhangfei.gao@linaro.org</email>
</author>
<published>2013-08-27T02:20:10Z</published>
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<id>urn:sha1:8e6152bc660e69f526c6bf163ff0ebfdab90f6cf</id>
<content type='text'>
Add dmaengine driver for hisilicon k3 platform based on virt_dma

Signed-off-by: Zhangfei Gao &lt;zhangfei.gao@linaro.org&gt;
Tested-by: Kai Yang &lt;jean.yangkai@huawei.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
</entry>
<entry>
<title>usb: musb dma: add cppi41 dma driver</title>
<updated>2013-08-09T14:40:16Z</updated>
<author>
<name>Sebastian Andrzej Siewior</name>
<email>bigeasy@linutronix.de</email>
</author>
<published>2013-06-20T10:13:04Z</published>
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<id>urn:sha1:9b3452d1fa3c017d3664ff9e6a601daa6e0576eb</id>
<content type='text'>
This driver is currently used by musb' cppi41 couter part. I may merge
both dma engine user of musb at some point but not just yet.

The driver seems to work in RX/TX mode in host mode, tested on mass
storage. I increaed the size of the TX / RX transfers and waited for the
core code to cancel a transfers and it seems to recover.

v2..3:
- use mall transfers on RX side and check data toggle.
- use rndis mode on tx side so we haveon interrupt for 4096 transfers.
- remove custom "transferred" hack and use dmaengine_tx_status() to
  compute the total amount of data that has been transferred.
- cancel transfers and reclaim descriptors

v1..v2:
- RX path added
- dma mode 0 &amp; 1 is working
- device tree nodes re-created.

Cc: Vinod Koul &lt;vinod.koul@intel.com&gt;
Cc: Dan Williams &lt;djbw@fb.com&gt;
Signed-off-by: Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;
Signed-off-by: Felipe Balbi &lt;balbi@ti.com&gt;
</content>
</entry>
<entry>
<title>dma: Add a jz4740 dmaengine driver</title>
<updated>2013-07-05T06:10:50Z</updated>
<author>
<name>Lars-Peter Clausen</name>
<email>lars@metafoo.de</email>
</author>
<published>2013-05-30T16:25:02Z</published>
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<id>urn:sha1:7c169a42d961daccf5638ea41d1c76700ad6ca42</id>
<content type='text'>
This patch adds dmaengine support for the JZ4740 DMA controller. For now the
driver will be a wrapper around the custom JZ4740 DMA API. Once all users of the
custom JZ4740 DMA API have been converted to the dmaengine API the custom API
will be removed and direct hardware access will be added to the dmaengine
driver.

Signed-off-by: Lars-Peter Clausen &lt;lars@metafoo.de&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
</entry>
<entry>
<title>dma: dw: split driver to library part and platform code</title>
<updated>2013-07-05T06:10:44Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2013-06-05T12:26:45Z</published>
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<id>urn:sha1:9cade1a46c77dfc96d57a3ea6354e95b2a7fcf61</id>
<content type='text'>
To simplify the driver development let's split driver to library and platform
code parts. It helps us to add PCI driver in future.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
[Fixed compile error and few checkpatch issues]
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
</entry>
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