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<title>user/sven/linux.git/drivers/dma/dmaengine.c, branch v3.3.5</title>
<subtitle>Linux Kernel
</subtitle>
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<updated>2011-11-18T06:46:24Z</updated>
<entry>
<title>DMAEngine: Define interleaved transfer request api</title>
<updated>2011-11-18T06:46:24Z</updated>
<author>
<name>Jassi Brar</name>
<email>jaswinder.singh@linaro.org</email>
</author>
<published>2011-10-13T07:03:30Z</published>
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<id>urn:sha1:b14dab792dee3245b628e046d80a7fad5573fea6</id>
<content type='text'>
Define a new api that could be used for doing fancy data transfers
like interleaved to contiguous copy and vice-versa.
Traditional SG_list based transfers tend to be very inefficient in
such cases as where the interleave and chunk are only a few bytes,
which call for a very condensed api to convey pattern of the transfer.
This api supports all 4 variants of scatter-gather and contiguous transfer.

Of course, neither can this api help transfers that don't lend to DMA by
nature, i.e, scattered tiny read/writes with no periodic pattern.

Also since now we support SLAVE channels that might not provide
device_prep_slave_sg callback but device_prep_interleaved_dma,
remove the BUG_ON check.

Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
Acked-by: Barry Song &lt;Baohua.Song@csr.com&gt;
[renamed dmaxfer_template to dma_interleaved_template
 did fixup after the enum dma_transfer_merge]
Signed-off-by: Vinod Koul &lt;vinod.koul@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx</title>
<updated>2011-08-05T02:43:43Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-08-05T02:43:43Z</published>
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<id>urn:sha1:7f3bf7cd348cead84f8027b32aa30ea49fa64df5</id>
<content type='text'>
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
  dmaengine: use DEFINE_IDR for static initialization
  ioat: fix xor_idx_to_desc
  Avoid section type conflict in dma/ioat/dma_v3.c
  ioat: Adding PCI IDs for IOAT devices on SandyBridge platforms
</content>
</entry>
<entry>
<title>dmaengine: use DEFINE_IDR for static initialization</title>
<updated>2011-08-04T05:25:39Z</updated>
<author>
<name>Axel Lin</name>
<email>axel.lin@gmail.com</email>
</author>
<published>2011-07-20T03:32:28Z</published>
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<id>urn:sha1:21ef4b8b7a7d59a995bf44382de38c95587767d4</id>
<content type='text'>
We could use DEFINE_IDR for statically allocated idr
that allow us to save a few lines of code.

And also remove unneeded mutex_init() for dma_list_mutex, as
dma_list_mutex is initialized automatically by DEFINE_MUTEX().

Signed-off-by: Axel Lin &lt;axel.lin@gmail.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma</title>
<updated>2011-08-01T23:46:37Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-08-01T23:46:37Z</published>
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<id>urn:sha1:12ff47e7f5fb64c566f62e6cf6a3b291c51bd337</id>
<content type='text'>
* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (37 commits)
  Improve slave/cyclic DMA engine documentation
  dmaengine: pl08x: handle the rest of enums in pl08x_width
  DMA: PL08x: cleanup selection of burst size
  DMA: PL08x: avoid recalculating cctl at each prepare
  DMA: PL08x: cleanup selection of buswidth
  DMA: PL08x: constify plchan-&gt;cd and plat-&gt;slave_channels
  DMA: PL08x: separately store source/destination cctl
  DMA: PL08x: separately store source/destination slave address
  DMA: PL08x: clean up LLI debugging
  DMA: PL08x: select LLI bus only once per LLI setup
  DMA: PL08x: remove unused constants
  ARM: mxs-dma: reset after disable channel
  dma: intel_mid_dma: remove redundant pci_set_drvdata calls
  dma: mxs-dma: fix unterminated platform_device_id table
  dmaengine: pl330: make platform data optional
  dmaengine: imx-sdma: return proper error if kzalloc fails
  pch_dma: Fix CTL register access issue
  dmaengine: mxs-dma: skip request_irq for NO_IRQ
  dmaengine/coh901318: fix slave submission semantics
  dmaengine/ste_dma40: allow memory buswidth/burst to be configured
  ...

Fix trivial whitespace conflict in drivers/dma/mv_xor.c
</content>
</entry>
<entry>
<title>dmaengine: failure to get a specific DMA channel is not critical</title>
<updated>2011-06-24T10:43:16Z</updated>
<author>
<name>Guennadi Liakhovetski</name>
<email>g.liakhovetski@gmx.de</email>
</author>
<published>2011-06-20T15:02:47Z</published>
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<id>urn:sha1:a03a202e95fdaa3ff52ccfc2594ec531e5917816</id>
<content type='text'>
There exist systems with multiple DMA controllers with different
capabilities. For example, on some sh-mobile / rmobile systems there are
DMA controllers, whose channels can be configured to be used with
SD- and MMC-host controllers, serial ports etc. Besides there are also
DMA controllers, that can only be used for one special function, e.g.,
for USB. In such cases the DMA client filter function can just choose
to specify to the DMA driver, which channel it needs. Then the
.device_alloc_chan_resources() method of the DMA driver will check,
whether it can provide that dunction. If not, it will fail and the loop
in __dma_request_channel() will continue to the next DMA device, until
it finds a suitable one. This works fine with just one minor glitch:
the kernel logs error messages like

dmaengine: failed to get &lt;channel name&gt;: (-&lt;error code&gt;)

after each such non-critical failure. This patch lowers priority of
this message to the debug level.

Reported-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Signed-off-by: Guennadi Liakhovetski &lt;g.liakhovetski@gmx.de&gt;
Tested-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Tested-by: Magnus Damm &lt;damm@opensource.se&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
</content>
</entry>
<entry>
<title>net: remove mm.h inclusion from netdevice.h</title>
<updated>2011-06-22T02:17:20Z</updated>
<author>
<name>Alexey Dobriyan</name>
<email>adobriyan@gmail.com</email>
</author>
<published>2011-06-16T11:01:34Z</published>
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<id>urn:sha1:b7f080cfe223b3b7424872639d153695615a9255</id>
<content type='text'>
Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).

To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h =&gt; dmaengine.h =&gt; dma-mapping.h =&gt; scatterlist.h =&gt; mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.

Hope people are OK with tiny include file.

Note, that mm_types.h is still dragged in, but it is a separate story.

Signed-off-by: Alexey Dobriyan &lt;adobriyan@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>async_tx: make async_tx channel switching opt-in</title>
<updated>2010-10-08T00:08:32Z</updated>
<author>
<name>Dan Williams</name>
<email>dan.j.williams@intel.com</email>
</author>
<published>2010-10-07T23:44:50Z</published>
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<id>urn:sha1:5fc6d897fde352bad5db5767e7260741a8cdd9e9</id>
<content type='text'>
The majority of drivers in drivers/dma/ will never establish cross
channel operation chains and do not need the extra overhead in struct
dma_async_tx_descriptor.  Make channel switching opt-in by default.

Cc: Anatolij Gustschin &lt;agust@denx.de&gt;
Cc: Ira Snyder &lt;iws@ovro.caltech.edu&gt;
Cc: Linus Walleij &lt;linus.walleij@stericsson.com&gt;
Cc: Saeed Bishara &lt;saeed@marvell.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branches 'dma40', 'pl08x', 'fsldma', 'imx' and 'intel-mid' into dmaengine</title>
<updated>2010-10-07T22:19:01Z</updated>
<author>
<name>Dan Williams</name>
<email>dan.j.williams@intel.com</email>
</author>
<published>2010-10-07T22:19:01Z</published>
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<id>urn:sha1:6391987d6f8ced7d0fafaa1440dcc57bb4b34d8f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>dma: add support for scatterlist to scatterlist copy</title>
<updated>2010-10-07T21:41:40Z</updated>
<author>
<name>Ira Snyder</name>
<email>iws@ovro.caltech.edu</email>
</author>
<published>2010-09-30T11:46:44Z</published>
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<id>urn:sha1:a86ee03ce6f279ebe581a7a8c0c4393eaeb789ee</id>
<content type='text'>
This adds support for scatterlist to scatterlist DMA transfers. A
similar interface is exposed by the fsldma driver (through the DMA_SLAVE
API) and by the ste_dma40 driver (through an exported function).

This patch paves the way for making this type of copy operation a part
of the generic DMAEngine API. Futher patches will add support in
individual drivers.

Signed-off-by: Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>dmaengine: add possibility for cyclic transfers</title>
<updated>2010-10-05T22:49:26Z</updated>
<author>
<name>Sascha Hauer</name>
<email>s.hauer@pengutronix.de</email>
</author>
<published>2010-09-30T13:56:32Z</published>
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<id>urn:sha1:782bc950d84e404422ba21008fd51ee894c8d231</id>
<content type='text'>
Cyclic transfers are useful for audio where a single buffer divided
in periods has to be transfered endlessly until stopped. After being
prepared the transfer is started using the dma_async_descriptor-&gt;tx_submit
function. dma_async_descriptor-&gt;callback is called after each period.
The transfer is stopped using the DMA_TERMINATE_ALL callback.
While being used for cyclic transfers the channel cannot be used
for other transfer types.

Signed-off-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Cc: Haavard Skinnemoen &lt;haavard.skinnemoen@atmel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
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