<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/dma, branch v4.9.40</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.9.40</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.9.40'/>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/'/>
<updated>2017-06-29T11:00:31Z</updated>
<entry>
<title>dmaengine: bcm2835: Fix cyclic DMA period splitting</title>
<updated>2017-06-29T11:00:31Z</updated>
<author>
<name>Matthias Reichl</name>
<email>hias@horus.com</email>
</author>
<published>2017-02-20T19:01:16Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=25c7794ed046e9190200983e330f221170cb2b0a'/>
<id>urn:sha1:25c7794ed046e9190200983e330f221170cb2b0a</id>
<content type='text'>
commit 2201ac6129fa162ac24da089a034bb0971648ebb upstream.

The code responsible for splitting periods into chunks that
can be handled by the DMA controller missed to update total_len,
the number of bytes processed in the current period, when there
are more chunks to follow.

Therefore total_len was stuck at 0 and the code didn't work at all.
This resulted in a wrong control block layout and audio issues because
the cyclic DMA callback wasn't executing on period boundaries.

Fix this by adding the missing total_len update.

Signed-off-by: Matthias Reichl &lt;hias@horus.com&gt;
Signed-off-by: Martin Sperl &lt;kernel@martin.sperl.org&gt;
Tested-by: Clive Messer &lt;clive.messer@digitaldreamtime.co.uk&gt;
Reviewed-by: Eric Anholt &lt;eric@anholt.net&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Amit Pundir &lt;amit.pundir@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: mv_xor_v2: set DMA mask to 40 bits</title>
<updated>2017-06-14T13:05:57Z</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2017-05-05T09:57:50Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=1f67d28d2707dc1da24c7f94b0a80721ea89abac'/>
<id>urn:sha1:1f67d28d2707dc1da24c7f94b0a80721ea89abac</id>
<content type='text'>
commit b2d3c270f9f2fb82518ac500a9849c3aaf503852 upstream.

The XORv2 engine on Armada 7K/8K can only access the first 40 bits of
the physical address space, so the DMA mask must be set accordingly.

Fixes: 19a340b1a820 ("dmaengine: mv_xor_v2: new driver")
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: mv_xor_v2: remove interrupt coalescing</title>
<updated>2017-06-14T13:05:57Z</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2017-05-05T09:57:49Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=eb5afaba617739df3fea2d6312cf493822d14934'/>
<id>urn:sha1:eb5afaba617739df3fea2d6312cf493822d14934</id>
<content type='text'>
commit 9dd4f319bac25334a869d9276b19eac9e478fd33 upstream.

The current implementation of interrupt coalescing doesn't work, because
it doesn't configure the coalescing timer, which is needed to make sure
we get an interrupt at some point.

As a fix for stable, we simply remove the interrupt coalescing
functionality. It will be re-introduced properly in a future commit.

Fixes: 19a340b1a820 ("dmaengine: mv_xor_v2: new driver")
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: mv_xor_v2: fix tx_submit() implementation</title>
<updated>2017-06-14T13:05:57Z</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2017-05-05T09:57:48Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=b2c8bb06bc8322951e426cbafe45deae36a124da'/>
<id>urn:sha1:b2c8bb06bc8322951e426cbafe45deae36a124da</id>
<content type='text'>
commit 44d5887a8bf1e86915c8ff647337cb138149da82 upstream.

The mv_xor_v2_tx_submit() gets the next available HW descriptor by
calling mv_xor_v2_get_desq_write_ptr(), which reads a HW register
telling the next available HW descriptor. This was working fine when HW
descriptors were issued for processing directly in tx_submit().

However, as part of the review process of the driver, a change was
requested to move the actual kick-off of HW descriptors processing to
-&gt;issue_pending(). Due to this, reading the HW register to know the next
available HW descriptor no longer works.

So instead of using this HW register, we implemented a software index
pointing to the next available HW descriptor.

Fixes: 19a340b1a820 ("dmaengine: mv_xor_v2: new driver")
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: mv_xor_v2: enable XOR engine after its configuration</title>
<updated>2017-06-14T13:05:57Z</updated>
<author>
<name>Hanna Hawa</name>
<email>hannah@marvell.com</email>
</author>
<published>2017-05-05T09:57:47Z</published>
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<id>urn:sha1:0d0918504a96d406d1a8beedab47bfb93c01ee67</id>
<content type='text'>
commit ab2c5f0a77fe49bdb6e307b397496373cb47d2c2 upstream.

The engine was enabled prior to its configuration, which isn't
correct. This patch relocates the activation of the XOR engine, to be
after the configuration of the XOR engine.

Fixes: 19a340b1a820 ("dmaengine: mv_xor_v2: new driver")
Signed-off-by: Hanna Hawa &lt;hannah@marvell.com&gt;
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: mv_xor_v2: do not use descriptors not acked by async_tx</title>
<updated>2017-06-14T13:05:57Z</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2017-05-05T09:57:46Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=e2a092eab8a5b0390e48c04b5d35c85d1c8900be'/>
<id>urn:sha1:e2a092eab8a5b0390e48c04b5d35c85d1c8900be</id>
<content type='text'>
commit bc473da1ed726c975ad47f8d7d27631de11356d8 upstream.

Descriptors that have not been acknowledged by the async_tx layer
should not be re-used, so this commit adjusts the implementation of
mv_xor_v2_prep_sw_desc() to skip descriptors for which
async_tx_test_ack() is false.

Fixes: 19a340b1a820 ("dmaengine: mv_xor_v2: new driver")
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: mv_xor_v2: properly handle wrapping in the array of HW descriptors</title>
<updated>2017-06-14T13:05:57Z</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2017-05-05T09:57:45Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=67b1684c4a5e092263b2b9fc3670450eedb620cf'/>
<id>urn:sha1:67b1684c4a5e092263b2b9fc3670450eedb620cf</id>
<content type='text'>
commit 2aab4e18152cd30cb5d2f4c27629fc8a04aed979 upstream.

mv_xor_v2_tasklet() is looping over completed HW descriptors. Before the
loop, it initializes 'next_pending_hw_desc' to the first HW descriptor
to handle, and then the loop simply increments this point, without
taking care of wrapping when we reach the last HW descriptor. The
'pending_ptr' index was being wrapped back to 0 at the end, but it
wasn't used in each iteration of the loop to calculate
next_pending_hw_desc.

This commit fixes that, and makes next_pending_hw_desc a variable local
to the loop itself.

Fixes: 19a340b1a820 ("dmaengine: mv_xor_v2: new driver")
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: mv_xor_v2: handle mv_xor_v2_prep_sw_desc() error properly</title>
<updated>2017-06-14T13:05:57Z</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2017-05-05T09:57:44Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=f08c84d4c7450135ccd90e7d4ce10335d998ea6f'/>
<id>urn:sha1:f08c84d4c7450135ccd90e7d4ce10335d998ea6f</id>
<content type='text'>
commit eb8df543e444492328f506adffc7dfe94111f1bd upstream.

The mv_xor_v2_prep_sw_desc() is called from a few different places in
the driver, but we never take into account the fact that it might
return NULL. This commit fixes that, ensuring that we don't panic if
there are no more descriptors available.

Fixes: 19a340b1a820 ("dmaengine: mv_xor_v2: new driver")
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: ep93xx: Don't drain the transfers in terminate_all()</title>
<updated>2017-06-14T13:05:57Z</updated>
<author>
<name>Alexander Sverdlin</name>
<email>alexander.sverdlin@gmail.com</email>
</author>
<published>2017-05-22T14:05:23Z</published>
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<id>urn:sha1:f2e9d10bf1a21a982ee179bab798e3801eb410af</id>
<content type='text'>
commit 98f9de366fccee7572c646af226b2d4b4841e3b5 upstream.

Draining the transfers in terminate_all callback happens with IRQs disabled,
therefore induces huge latency:

 irqsoff latency trace v1.1.5 on 4.11.0
 --------------------------------------------------------------------
 latency: 39770 us, #57/57, CPU#0 | (M:preempt VP:0, KP:0, SP:0 HP:0)
    -----------------
    | task: process-129 (uid:0 nice:0 policy:2 rt_prio:50)
    -----------------
  =&gt; started at: _snd_pcm_stream_lock_irqsave
  =&gt; ended at:   snd_pcm_stream_unlock_irqrestore

                  _------=&gt; CPU#
                 / _-----=&gt; irqs-off
                | / _----=&gt; need-resched
                || / _---=&gt; hardirq/softirq
                ||| / _--=&gt; preempt-depth
                |||| /     delay
  cmd     pid   ||||| time  |   caller
     \   /      |||||  \    |   /
process-129     0d.s.    3us : _snd_pcm_stream_lock_irqsave
process-129     0d.s1    9us : snd_pcm_stream_lock &lt;-_snd_pcm_stream_lock_irqsave
process-129     0d.s1   15us : preempt_count_add &lt;-snd_pcm_stream_lock
process-129     0d.s2   22us : preempt_count_add &lt;-snd_pcm_stream_lock
process-129     0d.s3   32us : snd_pcm_update_hw_ptr0 &lt;-snd_pcm_period_elapsed
process-129     0d.s3   41us : soc_pcm_pointer &lt;-snd_pcm_update_hw_ptr0
process-129     0d.s3   50us : dmaengine_pcm_pointer &lt;-soc_pcm_pointer
process-129     0d.s3   58us+: snd_dmaengine_pcm_pointer_no_residue &lt;-dmaengine_pcm_pointer
process-129     0d.s3   96us : update_audio_tstamp &lt;-snd_pcm_update_hw_ptr0
process-129     0d.s3  103us : snd_pcm_update_state &lt;-snd_pcm_update_hw_ptr0
process-129     0d.s3  112us : xrun &lt;-snd_pcm_update_state
process-129     0d.s3  119us : snd_pcm_stop &lt;-xrun
process-129     0d.s3  126us : snd_pcm_action &lt;-snd_pcm_stop
process-129     0d.s3  134us : snd_pcm_action_single &lt;-snd_pcm_action
process-129     0d.s3  141us : snd_pcm_pre_stop &lt;-snd_pcm_action_single
process-129     0d.s3  150us : snd_pcm_do_stop &lt;-snd_pcm_action_single
process-129     0d.s3  157us : soc_pcm_trigger &lt;-snd_pcm_do_stop
process-129     0d.s3  166us : snd_dmaengine_pcm_trigger &lt;-soc_pcm_trigger
process-129     0d.s3  175us : ep93xx_dma_terminate_all &lt;-snd_dmaengine_pcm_trigger
process-129     0d.s3  182us : preempt_count_add &lt;-ep93xx_dma_terminate_all
process-129     0d.s4  189us*: m2p_hw_shutdown &lt;-ep93xx_dma_terminate_all
process-129     0d.s4 39472us : m2p_hw_setup &lt;-ep93xx_dma_terminate_all

 ... rest skipped...

process-129     0d.s. 40080us : &lt;stack trace&gt;
 =&gt; ep93xx_dma_tasklet
 =&gt; tasklet_action
 =&gt; __do_softirq
 =&gt; irq_exit
 =&gt; __handle_domain_irq
 =&gt; vic_handle_irq
 =&gt; __irq_usr
 =&gt; 0xb66c6668

Just abort the transfers and warn if the HW state is not what we expect.
Move draining into device_synchronize callback.

Signed-off-by: Alexander Sverdlin &lt;alexander.sverdlin@gmail.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>dmaengine: ep93xx: Always start from BASE0</title>
<updated>2017-06-14T13:05:56Z</updated>
<author>
<name>Alexander Sverdlin</name>
<email>alexander.sverdlin@gmail.com</email>
</author>
<published>2017-05-22T14:05:22Z</published>
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<id>urn:sha1:b7e7a4d52a95976093edea6e13bd1c09ef86665d</id>
<content type='text'>
commit 0037ae47812b1f431cc602100d1d51f37d77b61e upstream.

The current buffer is being reset to zero on device_free_chan_resources()
but not on device_terminate_all(). It could happen that HW is restarted and
expects BASE0 to be used, but the driver is not synchronized and will start
from BASE1. One solution is to reset the buffer explicitly in
m2p_hw_setup().

Signed-off-by: Alexander Sverdlin &lt;alexander.sverdlin@gmail.com&gt;
Signed-off-by: Vinod Koul &lt;vinod.koul@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
</feed>
