<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/edac/igen6_edac.c, branch v6.19</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.19</id>
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<updated>2025-11-21T18:20:51Z</updated>
<entry>
<title>EDAC/igen6: Fix error handling in igen6_edac driver</title>
<updated>2025-11-21T18:20:51Z</updated>
<author>
<name>Ma Ke</name>
<email>make24@iscas.ac.cn</email>
</author>
<published>2025-11-05T09:02:44Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=ef1b6d904993d3a21baa7d4105e1a4e4ba9dd6de'/>
<id>urn:sha1:ef1b6d904993d3a21baa7d4105e1a4e4ba9dd6de</id>
<content type='text'>
The igen6_edac driver calls device_initialize() for all memory
controllers in igen6_register_mci(), but misses corresponding
put_device() calls in error paths and during normal shutdown in
igen6_unregister_mcis().

Adding the missing put_device() calls improves code readability and
ensures proper reference counting for the device structure.

Found by code review.

Signed-off-by: Ma Ke &lt;make24@iscas.ac.cn&gt;
Reviewed-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://patch.msgid.link/20251105090244.23327-1-make24@iscas.ac.cn
</content>
</entry>
<entry>
<title>EDAC/igen6: Add Intel Wildcat Lake SoCs support</title>
<updated>2025-07-07T17:51:58Z</updated>
<author>
<name>Lili Li</name>
<email>lili.li@intel.com</email>
</author>
<published>2025-07-04T15:16:08Z</published>
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<id>urn:sha1:773d8bb5ba7f64ee708caecb8deb0930bc1e1cf7</id>
<content type='text'>
Intel Wildcat Lake is a mobile derivative of Panther Lake with one
memory controller. Wildcat Lake SoCs share the same IBECC registers
with Meteor Lake-P SoCs.

Add a compute die ID and a new configuration structure for Wildcat
Lake SoCs with In-Band ECC capability for EDAC support.

Signed-off-by: Lili Li &lt;lili.li@intel.com&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/r/20250704151609.7833-3-qiuxu.zhuo@intel.com
</content>
</entry>
<entry>
<title>EDAC/igen6: Reduce log level to debug for absent memory controllers</title>
<updated>2025-06-23T10:46:31Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2025-06-18T16:23:07Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=10fa9a4e4dc332e0ff18150c82ba87311deb82bc'/>
<id>urn:sha1:10fa9a4e4dc332e0ff18150c82ba87311deb82bc</id>
<content type='text'>
The current KERN_WARNING level message for detecting absent memory
controllers is overly dramatic. The BIOS likely had valid reasons to
disable the memory controller (e.g. it isn't connected to any DIMM
slots on the motherboard for this system). So there's nothing actually
wrong that needs to be fixed.

Reduce the log level to KERN_DEBUG to eliminate the false warning.

Suggested-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://lore.kernel.org/r/20250618162307.1523736-2-qiuxu.zhuo@intel.com
</content>
</entry>
<entry>
<title>EDAC/igen6: Fix NULL pointer dereference</title>
<updated>2025-06-18T18:19:45Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2025-06-18T16:23:06Z</published>
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<id>urn:sha1:88efa0de3285be66969b71ec137d9dab1ee19e52</id>
<content type='text'>
A kernel panic was reported with the following kernel log:

  EDAC igen6: Expected 2 mcs, but only 1 detected.
  BUG: unable to handle page fault for address: 000000000000d570
  ...
  Hardware name: Notebook V54x_6x_TU/V54x_6x_TU, BIOS Dasharo (coreboot+UEFI) v0.9.0 07/17/2024
  RIP: e030:ecclog_handler+0x7e/0xf0 [igen6_edac]
  ...
  igen6_probe+0x2a0/0x343 [igen6_edac]
  ...
  igen6_init+0xc5/0xff0 [igen6_edac]
  ...

This issue occurred because one memory controller was disabled by
the BIOS but the igen6_edac driver still checked all the memory
controllers, including this absent one, to identify the source of
the error. Accessing the null MMIO for the absent memory controller
resulted in the oops above.

Fix this issue by reverting the configuration structure to non-const
and updating the field 'res_cfg-&gt;num_imc' to reflect the number of
detected memory controllers.

Fixes: 20e190b1c1fd ("EDAC/igen6: Skip absent memory controllers")
Reported-by: Marek Marczykowski-Górecki &lt;marmarek@invisiblethingslab.com&gt;
Closes: https://lore.kernel.org/all/aFFN7RlXkaK_loQb@mail-itl/
Suggested-by: Borislav Petkov &lt;bp@alien8.de&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Tested-by: Marek Marczykowski-Górecki &lt;marmarek@invisiblethingslab.com&gt;
Link: https://lore.kernel.org/r/20250618162307.1523736-1-qiuxu.zhuo@intel.com
</content>
</entry>
<entry>
<title>EDAC/igen6: Add Intel Amston Lake SoCs support</title>
<updated>2025-04-17T17:15:35Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2025-04-08T13:24:55Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=099d2db3625b3baab07d2d5cfcd6cbfa14067ae9'/>
<id>urn:sha1:099d2db3625b3baab07d2d5cfcd6cbfa14067ae9</id>
<content type='text'>
Intel Amston Lake is a series of SoCs tailored for edge computing needs.
The Amston Lake SoCs, equipped with IBECC(In-Band ECC) capability, share
the same IBECC registers with Alder Lake-N SoCs. Add the Intel Amston Lake
SoC compute die ID for EDAC support.

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/r/20250408132455.489046-4-qiuxu.zhuo@intel.com
</content>
</entry>
<entry>
<title>EDAC/igen6: Add Intel Arizona Beach SoCs support</title>
<updated>2025-04-17T17:09:14Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2025-04-08T13:24:54Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=b804d7c59aea05412d5e02a068d9486e9177a9e9'/>
<id>urn:sha1:b804d7c59aea05412d5e02a068d9486e9177a9e9</id>
<content type='text'>
The Intel Arizona Beach SoC series is oriented toward network computing.
Some types of these SoCs are equipped with IBECC(In-Band ECC) and share
the same IBECC registers with Alder Lake-N SoCs. Add a die ID for Arizona
Beach SoC for EDAC support.

[Tony: s/Arizona Lake/Arizona Beach/ in commit message]

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/r/20250408132455.489046-3-qiuxu.zhuo@intel.com
</content>
</entry>
<entry>
<title>EDAC/igen6: Skip absent memory controllers</title>
<updated>2025-04-17T17:06:32Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2025-04-08T13:24:53Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=20e190b1c1fd88b21cc5106c12cfe6def5ab849d'/>
<id>urn:sha1:20e190b1c1fd88b21cc5106c12cfe6def5ab849d</id>
<content type='text'>
Some BIOS versions may fuse off certain memory controllers and set the
registers of these absent memory controllers to ~0. The current igen6_edac
mistakenly enumerates these absent memory controllers and registers them
with the EDAC core.

Skip the absent memory controllers to avoid mistakenly enumerating them.

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/r/20250408132455.489046-2-qiuxu.zhuo@intel.com
</content>
</entry>
<entry>
<title>Merge remote-tracking branches 'ras/edac-cxl', 'ras/edac-drivers' and 'ras/edac-misc' into edac-updates</title>
<updated>2025-03-25T13:53:27Z</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2025-03-25T13:53:27Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=298ffd537585ceb45034749d51d8a82c8f3f3c0c'/>
<id>urn:sha1:298ffd537585ceb45034749d51d8a82c8f3f3c0c</id>
<content type='text'>
* ras/edac-cxl:
  EDAC/device: Fix dev_set_name() format string
  EDAC: Update memory repair control interface for memory sparing feature
  EDAC: Add a memory repair control feature
  EDAC: Add a Error Check Scrub control feature
  EDAC: Add scrub control feature
  EDAC: Add support for EDAC device features control

* ras/edac-drivers:
  EDAC/ie31200: Switch Raptor Lake-S to interrupt mode
  EDAC/ie31200: Add Intel Raptor Lake-S SoCs support
  EDAC/ie31200: Break up ie31200_probe1()
  EDAC/ie31200: Fold the two channel loops into one loop
  EDAC/ie31200: Make struct dimm_data contain decoded information
  EDAC/ie31200: Make the memory controller resources configurable
  EDAC/ie31200: Simplify the pci_device_id table
  EDAC/ie31200: Fix the 3rd parameter name of *populate_dimm_info()
  EDAC/ie31200: Fix the error path order of ie31200_init()
  EDAC/ie31200: Fix the DIMM size mask for several SoCs
  EDAC/ie31200: Fix the size of EDAC_MC_LAYER_CHIP_SELECT layer
  EDAC/{skx_common,i10nm}: Fix some missing error reports on Emerald Rapids
  EDAC/igen6: Fix the flood of invalid error reports
  EDAC/ie31200: work around false positive build warning

* ras/edac-misc:
  MAINTAINERS: Add a secondary maintainer for bluefield_edac
  EDAC/pnd2: Make read-only const array intlv static
  EDAC/igen6: Constify struct res_config
  EDAC/amd64: Simplify return statement in dct_ecc_enabled()
  EDAC: Use string choice helper functions

Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
</content>
</entry>
<entry>
<title>EDAC/igen6: Constify struct res_config</title>
<updated>2025-03-03T15:33:03Z</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2025-01-31T20:27:02Z</published>
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<id>urn:sha1:ac2fbe0948a551e9732b3c5ebf0a37281af68df2</id>
<content type='text'>
The res_config structs are not modified in this driver.

Constifying these structures moves some data to a read-only section, so
increase overall security, especially when the structure holds some function
pointers.

On a x86_64, with allmodconfig, as an example:

  Before:
  ======
     text	   data	    bss	    dec	    hex	filename
    36777	   2479	   4304	  43560	   aa28	drivers/edac/igen6_edac.o

  After:
  =====
     text	   data	    bss	    dec	    hex	filename
    37297	   1959	   4304	  43560	   aa28	drivers/edac/igen6_edac.o

Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Reviewed-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Link: https://lore.kernel.org/r/a06153870951a64b438e76adf97d440e02c1a1fc.1738355198.git.christophe.jaillet@wanadoo.fr
</content>
</entry>
<entry>
<title>EDAC/igen6: Fix the flood of invalid error reports</title>
<updated>2025-02-21T01:00:38Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2025-02-12T08:33:54Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=267e5b1d267539d9a927dc04aab6f15aca57da92'/>
<id>urn:sha1:267e5b1d267539d9a927dc04aab6f15aca57da92</id>
<content type='text'>
The ECC_ERROR_LOG register of certain SoCs may contain the invalid value
~0, which results in a flood of invalid error reports in polling mode.

Fix the flood of invalid error reports by skipping the invalid ECC error
log value ~0.

Fixes: e14232afa944 ("EDAC/igen6: Add polling support")
Reported-by: Ramses &lt;ramses@well-founded.dev&gt;
Closes: https://lore.kernel.org/all/OISL8Rv--F-9@well-founded.dev/
Tested-by: Ramses &lt;ramses@well-founded.dev&gt;
Reported-by: John &lt;therealgraysky@proton.me&gt;
Closes: https://lore.kernel.org/all/p5YcxOE6M3Ncxpn2-Ia_wCt61EM4LwIiN3LroQvT_-G2jMrFDSOW5k2A9D8UUzD2toGpQBN1eI0sL5dSKnkO8iteZegLoQEj-DwQaMhGx4A=@proton.me/
Tested-by: John &lt;therealgraysky@proton.me&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/r/20250212083354.31919-1-qiuxu.zhuo@intel.com
</content>
</entry>
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