<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c, branch v6.15.2</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.15.2</id>
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<updated>2025-03-14T03:12:52Z</updated>
<entry>
<title>drm/amdgpu: Add amdgpu_sriov_multi_vf_mode function</title>
<updated>2025-03-14T03:12:52Z</updated>
<author>
<name>Emily Deng</name>
<email>Emily.Deng@amd.com</email>
</author>
<published>2025-02-06T05:09:00Z</published>
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<id>urn:sha1:8d5e70ba5da21452735474b70322446aeb442c94</id>
<content type='text'>
Use amdgpu_sriov_multi_vf_mode to replace amdgpu_sriov_vf(adev) &amp;&amp; !amdgpu_sriov_is_pp_one_vf(adev).

Signed-off-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add amdgpu_vcn_sched_mask debugfs</title>
<updated>2024-12-10T15:26:50Z</updated>
<author>
<name>Sathishkumar S</name>
<email>sathishkumar.sundararaju@amd.com</email>
</author>
<published>2024-11-29T04:17:47Z</published>
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<id>urn:sha1:de258d06fdab578b24c18756a6ed21a1b23db6d1</id>
<content type='text'>
Add debugfs entry to enable or disable job submission to
specific vcn instances. The entry is created only when
there is more than an instance and is unified queue type.

Signed-off-by: Sathishkumar S &lt;sathishkumar.sundararaju@amd.com&gt;
Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add missing size check in amdgpu_debugfs_gprwave_read()</title>
<updated>2024-11-05T15:35:59Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2024-10-23T20:52:08Z</published>
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<id>urn:sha1:f5d873f5825b40d886d03bd2aede91d4cf002434</id>
<content type='text'>
Avoid a possible buffer overflow if size is larger than 4K.

Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Adjust debugfs eviction and IB access permissions</title>
<updated>2024-11-05T15:35:56Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2024-10-23T20:39:36Z</published>
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<id>urn:sha1:7ba9395430f611cfc101b1c2687732baafa239d5</id>
<content type='text'>
Users should not be able to run these.

Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Adjust debugfs register access permissions</title>
<updated>2024-11-05T15:35:49Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2024-10-23T20:37:52Z</published>
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<id>urn:sha1:c0cfd2e652553d607b910be47d0cc5a7f3a78641</id>
<content type='text'>
Regular users shouldn't have read access.

Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add amdgpu_sdma_sched_mask debugfs</title>
<updated>2024-11-04T17:06:15Z</updated>
<author>
<name>Jesse Zhang</name>
<email>jesse.zhang@amd.com</email>
</author>
<published>2024-10-29T02:14:35Z</published>
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<id>urn:sha1:d2e3961ae37171811a3d442e601599b85711adcb</id>
<content type='text'>
Userspace wants to run jobs on a specific sdma ring for verification purposes.
This debugfs entry helps to disable or enable submitting jobs to a specific ring.
This entry is populated only if there are at least two or more cores in the sdma ip.

Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Suggested-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Tim Huang &lt;tim.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add amdgpu_gfx_sched_mask and amdgpu_compute_sched_mask debugfs</title>
<updated>2024-11-04T17:05:53Z</updated>
<author>
<name>Jesse Zhang</name>
<email>jesse.zhang@amd.com</email>
</author>
<published>2024-10-29T02:11:05Z</published>
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<id>urn:sha1:c5c63d9cb5d3bbb2fc5973757616b17629795829</id>
<content type='text'>
compute/gfx may have multiple rings on some hardware.
In some cases, userspace wants to run jobs on a specific ring for validation purposes.
This debugfs entry helps to disable or enable submitting jobs to a specific ring.
This entry is populated only if there are at least two or more cores in the gfx/compute ip.

Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Suggested-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Tim Huang &lt;tim.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add amdgpu_jpeg_sched_mask debugfs</title>
<updated>2024-09-26T21:06:17Z</updated>
<author>
<name>Sathishkumar S</name>
<email>sathishkumar.sundararaju@amd.com</email>
</author>
<published>2024-09-09T09:22:39Z</published>
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<id>urn:sha1:f0b19b84d3918e88c27e6e39a7a4bca2b3fb7709</id>
<content type='text'>
JPEG_4_0_3 has up to 32 jpeg cores and a single mjpeg video decode
will use all available cores on the hardware. This debugfs entry
helps to disable or enable job submission to a cluster of cores or
one specific core in the ip for debugging. The entry is populated
only if there is at least two or more cores in the jpeg ip.

Signed-off-by: Sathishkumar S &lt;sathishkumar.sundararaju@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Remove debugfs amdgpu_reset_dump_register_list</title>
<updated>2024-08-06T14:42:09Z</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2024-07-30T05:30:06Z</published>
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<id>urn:sha1:17277da26623d4aa8bdda628d0024cf2f2e39ae6</id>
<content type='text'>
There are some problem with existing amdgpu_reset_dump_register_list
debugfs node. It is supposed to read a list of registers but there
could be cases when the IP is not in correct power state. Register
read in such cases could lead to more problems.

We are taking care of all such power states in devcoredump and
dumping the registers of need for debugging. So cleaning this code
and we dont need this functionality via debugfs anymore.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix invadate operation for pg_flags</title>
<updated>2024-05-23T19:09:50Z</updated>
<author>
<name>Jesse Zhang</name>
<email>jesse.zhang@amd.com</email>
</author>
<published>2024-05-21T07:02:54Z</published>
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<id>urn:sha1:806e8c5579405a1920902ae58bd7907341a37f7d</id>
<content type='text'>
Since the type of pg_flags is u32, adev-&gt;pg_flags &gt;&gt; 16 &gt;&gt; 16 is 0
regardless of the values of its operands.

So removing the operations upper_32_bits and lower_32_bits.

Signed-off-by: Jesse Zhang &lt;Jesse.Zhang@amd.com&gt;
Suggested-by: Tim Huang &lt;Tim.Huang@amd.com&gt;
Reviewed-by: Tim Huang &lt;Tim.Huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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