<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/gpu/drm/amd/amdgpu/nv.c, branch v5.4.233</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.4.233</id>
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<updated>2020-02-24T07:36:27Z</updated>
<entry>
<title>drm/amdgpu/sriov: workaround on rev_id for Navi12 under sriov</title>
<updated>2020-02-24T07:36:27Z</updated>
<author>
<name>Tiecheng Zhou</name>
<email>Tiecheng.Zhou@amd.com</email>
</author>
<published>2020-01-08T05:44:29Z</published>
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<id>urn:sha1:9f3a2e147f0e81b6c9d3104c94903dc14c9f4e5a</id>
<content type='text'>
[ Upstream commit df5e984c8bd414561c320d6cbbb66d53abf4c7e2 ]

guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
as a consequence, the rev_id and external_rev_id are wrong.

workaround it by hardcoding the rev_id to 0, which is the default value.

v2. add comment in the code

Signed-off-by: Tiecheng Zhou &lt;Tiecheng.Zhou@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: don't increment vram lost if we are in hibernation</title>
<updated>2019-10-02T17:58:19Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-10-01T21:45:27Z</published>
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<id>urn:sha1:49379032aa22a040fdd7708fcb6300d1d98a0f57</id>
<content type='text'>
We reset the GPU as part of our hibernation sequence so we need
to make sure we don't mark vram as lost in that case.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111879
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix undefined dm_ip_block for navi12</title>
<updated>2019-08-30T20:37:17Z</updated>
<author>
<name>Petr Cvek</name>
<email>petrcvekcz@gmail.com</email>
</author>
<published>2019-08-30T14:31:58Z</published>
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<id>urn:sha1:20c14ee135011f2a0fb2f987f05fd9655e804a9d</id>
<content type='text'>
There is missing "if defined" CONFIG_DRM_AMD_DC block for non DC
configurations. This will cause link error. The patch is fixing that.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=110979
Signed-off-by: Petr Cvek &lt;petrcvekcz@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: introduce vram lost for reset (v2)</title>
<updated>2019-08-29T20:52:32Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2019-08-27T08:32:55Z</published>
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<id>urn:sha1:e352625796b343cc85b7648a74a57e739b12dc27</id>
<content type='text'>
for SOC15/vega10 the BACO reset &amp; mode1 would introduce vram lost
in high end address range, current kmd's vram lost checking cannot
catch it since it only check very ahead visible frame buffer

v2:
cover NV as well

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable athub powergating for navi12</title>
<updated>2019-08-29T20:52:32Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-08-27T03:06:13Z</published>
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<id>urn:sha1:5ef3b8acdcdf7fb61a304390e49a6d7df8720314</id>
<content type='text'>
Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable vcn powergating for navi12</title>
<updated>2019-08-29T20:52:31Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-08-27T03:05:23Z</published>
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<id>urn:sha1:c1653ea05bcec582c82e7b134f5535d8fad42f48</id>
<content type='text'>
Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove set but not used variable 'psp_enabled'</title>
<updated>2019-08-22T03:18:51Z</updated>
<author>
<name>YueHaibing</name>
<email>yuehaibing@huawei.com</email>
</author>
<published>2019-06-27T07:53:50Z</published>
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<id>urn:sha1:6892c1f866bf17f9c945f04716610e4240c35f54</id>
<content type='text'>
Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/amd/amdgpu/nv.c: In function 'nv_common_early_init':
drivers/gpu/drm/amd/amdgpu/nv.c:471:7: warning:
 variable 'psp_enabled' set but not used [-Wunused-but-set-variable]

It's not used since inroduction in
commit c6b6a42175f5 ("drm/amdgpu: add navi10 common ip block (v3)")

Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: disable MMHUB PG for navi10</title>
<updated>2019-08-22T03:18:05Z</updated>
<author>
<name>Kenneth Feng</name>
<email>kenneth.feng@amd.com</email>
</author>
<published>2019-08-20T07:11:37Z</published>
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<id>urn:sha1:6da6c2792808d767012389d6d83cf9d11a2c8256</id>
<content type='text'>
Disable MMHUB PG for navi10 according to the production requirement.

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Kevin Wang &lt;kevin1.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable vcn clock gating for navi12</title>
<updated>2019-08-12T17:47:47Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-08-01T07:22:59Z</published>
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<id>urn:sha1:65872e59d67e67a343b555734abe2247dd6f7902</id>
<content type='text'>
enables vcn medium grained clock gating

Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable athub clock gating for navi12</title>
<updated>2019-08-12T17:47:47Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-08-01T07:19:10Z</published>
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<id>urn:sha1:ca51678db44fbc7d4018da47015cb5d9317de282</id>
<content type='text'>
enables athub medium grained clock gating and memory light sleep

Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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