<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/gpu/drm/amd/include/discovery.h, branch v5.4.205</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.4.205</id>
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<updated>2020-01-17T18:48:51Z</updated>
<entry>
<title>drm/amdgpu/discovery: reserve discovery data at the top of VRAM</title>
<updated>2020-01-17T18:48:51Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-10-10T12:44:20Z</published>
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<id>urn:sha1:0b1eb4058b951daff81ed7d1092b74c8d229a37b</id>
<content type='text'>
commit 5f6a556f98de425fcb7928456839a06f02156633 upstream.

IP Discovery data is TMR fenced by the latest PSP BL,
so we need to reserve this region.

Tested on navi10/12/14 with VBIOS integrated with latest PSP BL.

v2: use DISCOVERY_TMR_SIZE macro as bo size
    use amdgpu_bo_create_kernel_at() to allocate bo

Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amdgpu/discovery: update definition for struct die_header</title>
<updated>2019-06-21T23:58:21Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-03-27T09:46:04Z</published>
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<id>urn:sha1:6a8ee0257dee074ce8b96643f44b1efd1ce120b4</id>
<content type='text'>
Update to latest spec.

Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/discovery: add harvest info data table</title>
<updated>2019-06-21T23:58:21Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-02-21T09:55:30Z</published>
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<id>urn:sha1:70cbfe3d64b84e9f4c47c186942cd70d6495b465</id>
<content type='text'>
Add support for the harvest tables.

Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/discovery: update definitions of table_info and binary_header</title>
<updated>2019-06-21T23:58:21Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-02-21T09:55:05Z</published>
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<id>urn:sha1:478586d6d5c7db7a9af47746973463edea35ca11</id>
<content type='text'>
Use the proper definitions.

Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/discovery: add ip discovery initial support</title>
<updated>2019-06-21T23:58:21Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-06-20T15:18:50Z</published>
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<id>urn:sha1:f39f5bb1c9d68d557ff1539fea7adfe7c4d4ed7a</id>
<content type='text'>
The IP discovery table lists is populated by the psp at power on
and includes all of the hw details on the board:
- List of IPs and MMIO offsets
- IP harvest details
- IP configuration details

v2: prefix struct and function names with 'amdgpu'
v3: read table binary from vram using mmMM_INDEX and mmMM_DATA
    update TABLE_BINARY_MAX_SIZE to 64kb (1 TMR)
    add 'instance_number' field per ip info
    consider endianness and replace uint8/16/32_t with u8/16/32
    initialize register base addresses
    initialize adev-&gt;gfx.config and adev-&gt;gfx.cu_info to replace gpu info fw
    get major and minor version using a single api
    don't expose internal data structures in amdgpu_discovery.h
v4: RCC_CONFIG_MEMSIZE is in MB units
    hold mmio_idx_lock while reading ip discovery binary
v5: pick out discovery.h as a cross-OS header
    do structure pointer cast directly
    consider endianness while using the member of structure
    convert base addresses to dword

at boot up, PSP BL copies ip discovery binary from VBIOS(SPIROM) image to the
top of the frame buffer (just below the reserved regions for PSP &amp; SMU).

ip discovery data table includes the collection of each ip's identification
number, base addresses, version number, and harvest setting placeholder.

gc data table includes gfx info structure.

Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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