<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/gpu/drm/amd/include/ivsrcid, branch v5.4.43</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.4.43</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.4.43'/>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/'/>
<updated>2019-06-21T02:35:30Z</updated>
<entry>
<title>drm/amd/display: move dcn v1_0 irq source header to ivsrcid/dcn/</title>
<updated>2019-06-21T02:35:30Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2019-03-05T11:52:22Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=5527cd064012937915306806bcbb9de01f77b132'/>
<id>urn:sha1:5527cd064012937915306806bcbb9de01f77b132</id>
<content type='text'>
interrupt source packet definitions for the display block (DCN).

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add irq sources for vcn v2_0 (v2)</title>
<updated>2019-06-21T02:35:30Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2018-12-05T21:25:51Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=abade675e02e1b73da0c20ffaf08fbe309038298'/>
<id>urn:sha1:abade675e02e1b73da0c20ffaf08fbe309038298</id>
<content type='text'>
Add the interrupt source packet definitions.

v2: update (Alex)

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add irq sources for sdma v5_0</title>
<updated>2019-06-21T02:35:29Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2018-12-08T15:06:41Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=4984dd069f2995f239f075199ee8c0d9f020bcd9'/>
<id>urn:sha1:4984dd069f2995f239f075199ee8c0d9f020bcd9</id>
<content type='text'>
Add the interrupt source packet definitions.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add irq sources for gfx v10_1</title>
<updated>2019-06-21T02:35:29Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2018-12-05T21:23:34Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=cb3908c133f1285069673f11ad651d14ae0406cf'/>
<id>urn:sha1:cb3908c133f1285069673f11ad651d14ae0406cf</id>
<content type='text'>
Add the interrupt source packet definitions.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Add interrupt source definitions for SOC15 v3.</title>
<updated>2018-07-13T19:45:37Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-05-25T14:44:12Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=ba61bb17496d1664bf7c5c2fd650d5fd78bd0a92'/>
<id>urn:sha1:ba61bb17496d1664bf7c5c2fd650d5fd78bd0a92</id>
<content type='text'>
Stop using 'magic numbers' when registering interrupt sources.

v2: Switch to kernel style comments.

v3:
Rebase.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Add interrupt source definitions for VI v3.</title>
<updated>2018-07-13T19:45:23Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-07-11T21:34:35Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=530e7a660fb795452357b36cce26b839a9a187a9'/>
<id>urn:sha1:530e7a660fb795452357b36cce26b839a9a187a9</id>
<content type='text'>
Stop using 'magic numbers' when registering interrupt sources.

v2:
Clean redundant comments.
Switch to kernel style comments.

v3:
Add CP_ECC_ERROR define

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Add DCN ivsrcids (v2)</title>
<updated>2017-05-24T21:41:55Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>Andrey.Grodzovsky@amd.com</email>
</author>
<published>2017-02-01T15:12:19Z</published>
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<id>urn:sha1:a6ca5ac746d104019e76c29e69c2a1fc6dd2b29f</id>
<content type='text'>
v2: squash in some updates (Alex)

Signed-off-by: Andrey Grodzovsky &lt;Andrey.Grodzovsky@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add interrupt entries for CRTC_VERTICAL_INTERRUPT0.</title>
<updated>2017-03-30T03:55:43Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>Andrey.Grodzovsky@amd.com</email>
</author>
<published>2017-03-23T19:33:07Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=e5f586c763a079349398e2b0c7c271386193ac34'/>
<id>urn:sha1:e5f586c763a079349398e2b0c7c271386193ac34</id>
<content type='text'>
This used by DAL ISR logic for VBLANK handling.

Signed-off-by: Andrey Grodzovsky &lt;Andrey.Grodzovsky@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Adding IVSRC register headers</title>
<updated>2016-02-10T21:09:04Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2015-11-24T15:51:51Z</published>
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<id>urn:sha1:781095f903f398148cd0b646d3984234a715f29e</id>
<content type='text'>
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
