<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/gpu/drm/amd/pm, branch v6.1.59</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.1.59</id>
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<updated>2023-10-10T20:00:39Z</updated>
<entry>
<title>drm/amd: Fix logic error in sienna_cichlid_update_pcie_parameters()</title>
<updated>2023-10-10T20:00:39Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-09-27T02:07:43Z</published>
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<id>urn:sha1:d2894c4f473ab71cd68ef0f9b086148bb2c02132</id>
<content type='text'>
commit 2a1fe39a5be785e962e387146aed34fa9a829f3f upstream.

While aligning SMU11 with SMU13 implementation an assumption was made that
`dpm_context-&gt;dpm_tables.pcie_table` was populated in dpm table initialization
like in SMU13 but it isn't.

So restore some of the original logic and instead just check for
amdgpu_device_pcie_dynamic_switching_supported() to decide whether to hardcode
values; erring on the side of performance.

Cc: stable@vger.kernel.org # 6.1+
Reported-and-tested-by: Umio Yasuno &lt;coelacanth_dream@protonmail.com&gt;
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1447#note_2101382
Fixes: e701156ccc6c ("drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13")
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: fix variable dereferenced issue in amdgpu_device_attr_create()</title>
<updated>2023-09-13T07:42:42Z</updated>
<author>
<name>Yang Wang</name>
<email>kevinyang.wang@amd.com</email>
</author>
<published>2023-08-01T08:53:23Z</published>
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<id>urn:sha1:f27dff881f0b8f1a5bc64d48a19802dd520bc482</id>
<content type='text'>
[ Upstream commit 25e6373a5b8efc623443f2699d2b929bf3067d76 ]

- fix variable ('attr') dereferenced issue.
- using condition check instead of BUG_ON().

Fixes: 4e01847c38f7 ("drm/amdgpu: optimize amdgpu device attribute code")
Cc: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Signed-off-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/smu: use AverageGfxclkFrequency* to replace previous GFX Curr Clock</title>
<updated>2023-09-13T07:42:22Z</updated>
<author>
<name>Jane Jian</name>
<email>Jane.Jian@amd.com</email>
</author>
<published>2023-07-20T10:08:07Z</published>
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<id>urn:sha1:d7b1aa3e209841834965541988154c296196a808</id>
<content type='text'>
[ Upstream commit 4a37c55b859a69f429bfa7fab4fc43ee470b60ed ]

Report current GFX clock also from average clock value as the original
CurrClock data is not valid/accurate any more as per FW team

Signed-off-by: Jane Jian &lt;Jane.Jian@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: skip the RLC stop when S0i3 suspend for SMU v13.0.4/11</title>
<updated>2023-08-23T15:52:41Z</updated>
<author>
<name>Tim Huang</name>
<email>Tim.Huang@amd.com</email>
</author>
<published>2023-07-27T01:59:45Z</published>
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<id>urn:sha1:8abce61273c2815ea2ca096ecfb030c4b9e4e686</id>
<content type='text'>
commit 730d44e1fa306a20746ad4a85da550662aed9daa upstream.

For SMU v13.0.4/11, driver does not need to stop RLC for S0i3,
the firmwares will handle that properly.

Signed-off-by: Tim Huang &lt;Tim.Huang@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/pm: fix throttle_status for other than MP1 11.0.7</title>
<updated>2023-08-23T15:52:40Z</updated>
<author>
<name>Umio Yasuno</name>
<email>coelacanth_dream@protonmail.com</email>
</author>
<published>2023-08-08T06:40:42Z</published>
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<id>urn:sha1:7de99bf5bcd6d04b2202dd908782cc05edca0340</id>
<content type='text'>
commit 6a92761a86817ad15c9a562e2a809386237fae3e upstream.

Use the right metrics table version based on the firmware.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2720
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Umio Yasuno &lt;coelacanth_dream@protonmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm/smu7: move variables to where they are used</title>
<updated>2023-08-16T16:27:31Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-02-06T16:47:47Z</published>
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<id>urn:sha1:5525c289dbcf2b1adecc5e727e7d544ade9c7be1</id>
<content type='text'>
commit 63a9ab264a8c030482ab9e7e20b6c4c162299531 upstream.

Move variable declarations to where they are used.  Fixes
a segfault on smu7 V0 structures where some tables don't
exist.

Cc: Evan Quan &lt;evan.quan@amd.com&gt;
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2388
Fixes: b1a9557a7d00 ("drm/amd/pm: fulfill powerplay peak profiling mode shader/memory clock settings")
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: avoid unintentional shutdown due to temperature momentary fluctuation</title>
<updated>2023-08-16T16:27:23Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2023-08-11T16:40:31Z</published>
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<id>urn:sha1:0f19195d639764d68f6f316dda363ba29821e5bc</id>
<content type='text'>
commit b75efe88b20c2be28b67e2821a794cc183e32374 upstream

An intentional delay is added on soft ctf triggered. Then there will
be a double check for the GPU temperature before taking further
action. This can avoid unintended shutdown due to temperature
momentary fluctuation.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
[ Hand-modified because:
  * XCP support added to amdgpu.h in kernel 6.5
    and is not necessary for this fix.
  * SMU microcode initialization moved in
    32806038aa76 ("drm/amd: Load SMU microcode during early_init") ]
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1267
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2779
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: fulfill powerplay peak profiling mode shader/memory clock settings</title>
<updated>2023-08-16T16:27:23Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2023-08-11T16:40:30Z</published>
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<id>urn:sha1:b064f9ccf11cb4008a1f0e3c96099041b121af80</id>
<content type='text'>
commit b1a9557a7d00c758ed9e701fbb3445a13a49506f upstream

Enable peak profiling mode shader/memory clock reporting for powerplay
framework.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: expose swctf threshold setting for legacy powerplay</title>
<updated>2023-08-16T16:27:22Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2023-08-11T16:40:29Z</published>
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<id>urn:sha1:b844033ea813cb028a1961514ef37010fef9f543</id>
<content type='text'>
commit 064329c595da56eff6d7a7e7760660c726433139 upstream

Preparation for coming optimization which eliminates the influence of
GPU temperature momentary fluctuation.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: fulfill swsmu peak profiling mode shader/memory clock settings</title>
<updated>2023-08-16T16:27:22Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2023-08-11T16:40:28Z</published>
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<id>urn:sha1:2368afd60f647889d90fa4a42c7b27548f77dbd9</id>
<content type='text'>
commit 975b4b1d90ccf83da252907108f4090fb61b816e upstream

Enable peak profiling mode shader/memory clocks reporting for swsmu
framework.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
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