<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/gpu/drm/kmb, branch v5.16.4</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.16.4</id>
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<updated>2021-10-21T09:08:09Z</updated>
<entry>
<title>drm/kmb: Enable ADV bridge after modeset</title>
<updated>2021-10-21T09:08:09Z</updated>
<author>
<name>Anitha Chrisanthus</name>
<email>anitha.chrisanthus@intel.com</email>
</author>
<published>2021-06-07T21:17:11Z</published>
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<id>urn:sha1:74056092ff415e7e20ce2544689b32ee811c4f0b</id>
<content type='text'>
On KMB, ADV bridge must be programmed and powered on prior to
MIPI DSI HW initialization.

v2: changed to atomic_bridge_chain_enable (Sam)

Fixes: 98521f4d4b4c ("drm/kmb: Mipi DSI part of the display driver")
Co-developed-by: Edmund Dea &lt;edmund.j.dea@intel.com&gt;
Signed-off-by: Edmund Dea &lt;edmund.j.dea@intel.com&gt;
Signed-off-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211019230719.789958-1-anitha.chrisanthus@intel.com
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/kmb: Corrected typo in handle_lcd_irq</title>
<updated>2021-10-21T09:08:09Z</updated>
<author>
<name>Anitha Chrisanthus</name>
<email>anitha.chrisanthus@intel.com</email>
</author>
<published>2021-07-19T23:28:51Z</published>
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<id>urn:sha1:004d2719806fb8e355c1bccd538e82c04319d391</id>
<content type='text'>
Check for Overflow bits for layer3 in the irq handler.

Fixes: 7f7b96a8a0a1 ("drm/kmb: Add support for KeemBay Display")
Signed-off-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-5-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/kmb: Disable change of plane parameters</title>
<updated>2021-10-21T09:08:08Z</updated>
<author>
<name>Edmund Dea</name>
<email>edmund.j.dea@intel.com</email>
</author>
<published>2021-10-06T23:03:48Z</published>
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<id>urn:sha1:982f8ad666a1123028a077b6b009871a0dc9df26</id>
<content type='text'>
Due to HW limitations, KMB cannot change height, width, or
pixel format after initial plane configuration.

v2: removed memset disp_cfg as it is already zero.

Fixes: 7f7b96a8a0a1 ("drm/kmb: Add support for KeemBay Display")
Signed-off-by: Edmund Dea &lt;edmund.j.dea@intel.com&gt;
Signed-off-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-4-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/kmb: Remove clearing DPHY regs</title>
<updated>2021-10-21T09:08:08Z</updated>
<author>
<name>Edmund Dea</name>
<email>edmund.j.dea@intel.com</email>
</author>
<published>2021-04-20T22:31:53Z</published>
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<id>urn:sha1:13047a092c6d3f23b7d684b5b3fe46b2b50423b9</id>
<content type='text'>
Don't clear the shared DPHY registers common to MIPI Rx and MIPI Tx during
DSI initialization since this was causing MIPI Rx reset. Rest of the
writes are bitwise, so will not affect Mipi Rx side.

Fixes: 98521f4d4b4c ("drm/kmb: Mipi DSI part of the display driver")
Signed-off-by: Edmund Dea &lt;edmund.j.dea@intel.com&gt;
Signed-off-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-3-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/kmb: Limit supported mode to 1080p</title>
<updated>2021-10-21T09:08:08Z</updated>
<author>
<name>Anitha Chrisanthus</name>
<email>anitha.chrisanthus@intel.com</email>
</author>
<published>2021-01-08T22:34:13Z</published>
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<id>urn:sha1:a79f40cccd4644c32f6d5ae1ccf091a262e1dc57</id>
<content type='text'>
KMB only supports single resolution(1080p), this commit checks for
1920x1080x60 or 1920x1080x59 in crtc_mode_valid.
Also, modes with vfp &lt; 4 are not supported in KMB display. This change
prunes display modes with vfp &lt; 4.

v2: added vfp check

Fixes: 7f7b96a8a0a1 ("drm/kmb: Add support for KeemBay Display")
Co-developed-by: Edmund Dea &lt;edmund.j.dea@intel.com&gt;
Signed-off-by: Edmund Dea &lt;edmund.j.dea@intel.com&gt;
Signed-off-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Link:https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-2-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/kmb: Work around for higher system clock</title>
<updated>2021-10-21T09:08:08Z</updated>
<author>
<name>Anitha Chrisanthus</name>
<email>anitha.chrisanthus@intel.com</email>
</author>
<published>2020-12-15T19:13:09Z</published>
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<id>urn:sha1:3e4c31e8f70251732529a10934355084c7fab0ac</id>
<content type='text'>
Use a different value for system clock offset in the
ppl/llp ratio calculations for clocks higher than 500 Mhz.

Fixes: 98521f4d4b4c ("drm/kmb: Mipi DSI part of the display driver")
Signed-off-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-1-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>drm/kmb: Enable alpha blended second plane</title>
<updated>2021-10-06T09:05:44Z</updated>
<author>
<name>Edmund Dea</name>
<email>edmund.j.dea@intel.com</email>
</author>
<published>2020-12-04T22:34:29Z</published>
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<id>urn:sha1:c026565fe9be813fe826f7e5533ed763283af5f0</id>
<content type='text'>
Enable one additional plane that is alpha blended on top
of the primary plane.

This also fixes the below warnings when building with
-Warray-bounds:

drivers/gpu/drm/kmb/kmb_plane.c:135:20: warning: array subscript 3 is
above array bounds of 'struct layer_status[1]' [-Warray-bounds]
drivers/gpu/drm/kmb/kmb_plane.c:132:20: warning: array subscript 2 is
above array bounds of 'struct layer_status[1]' [-Warray-bounds]
drivers/gpu/drm/kmb/kmb_plane.c:129:20: warning: array subscript 1 is
above array bounds of 'struct layer_status[1]' [-Warray-bounds]

v2: corrected previous patch dependecies so it builds

Signed-off-by: Edmund Dea &lt;edmund.j.dea@intel.com&gt;
Signed-off-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Link: https://patchwork.kernel.org/project/dri-devel/patch/20210728003126.1425028-13-anitha.chrisanthus@intel.com/
Signed-off-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drm</title>
<updated>2021-09-01T18:26:46Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-09-01T18:26:46Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=477f70cd2a67904e04c2c2b9bd0fa2e95222f2f6'/>
<id>urn:sha1:477f70cd2a67904e04c2c2b9bd0fa2e95222f2f6</id>
<content type='text'>
Pull drm updates from Dave Airlie:
 "Highlights:

   - i915 has seen a lot of refactoring and uAPI cleanups due to a
     change in the upstream direction going forward

     This has all been audited with known userspace, but there may be
     some pitfalls that were missed.

   - i915 now uses common TTM to enable discrete memory on DG1/2 GPUs

   - i915 enables Jasper and Elkhart Lake by default and has preliminary
     XeHP/DG2 support

   - amdgpu adds support for Cyan Skillfish

   - lots of implicit fencing rules documented and fixed up in drivers

   - msm now uses the core scheduler

   - the irq midlayer has been removed for non-legacy drivers

   - the sysfb code now works on more than x86.

  Otherwise the usual smattering of stuff everywhere, panels, bridges,
  refactorings.

  Detailed summary:

  core:
   - extract i915 eDP backlight into core
   - DP aux bus support
   - drm_device.irq_enabled removed
   - port drivers to native irq interfaces
   - export gem shadow plane handling for vgem
   - print proper driver name in framebuffer registration
   - driver fixes for implicit fencing rules
   - ARM fixed rate compression modifier added
   - updated fb damage handling
   - rmfb ioctl logging/docs
   - drop drm_gem_object_put_locked
   - define DRM_FORMAT_MAX_PLANES
   - add gem fb vmap/vunmap helpers
   - add lockdep_assert(once) helpers
   - mark drm irq midlayer as legacy
   - use offset adjusted bo mapping conversion

  vgaarb:
   - cleanups

  fbdev:
   - extend efifb handling to all arches
   - div by 0 fixes for multiple drivers

  udmabuf:
   - add hugepage mapping support

  dma-buf:
   - non-dynamic exporter fixups
   - document implicit fencing rules

  amdgpu:
   - Initial Cyan Skillfish support
   - switch virtual DCE over to vkms based atomic
   - VCN/JPEG power down fixes
   - NAVI PCIE link handling fixes
   - AMD HDMI freesync fixes
   - Yellow Carp + Beige Goby fixes
   - Clockgating/S0ix/SMU/EEPROM fixes
   - embed hw fence in job
   - rework dma-resv handling
   - ensure eviction to system ram

  amdkfd:
   - uapi: SVM address range query added
   - sysfs leak fix
   - GPUVM TLB optimizations
   - vmfault/migration counters

  i915:
   - Enable JSL and EHL by default
   - preliminary XeHP/DG2 support
   - remove all CNL support (never shipped)
   - move to TTM for discrete memory support
   - allow mixed object mmap handling
   - GEM uAPI spring cleaning
       - add I915_MMAP_OBJECT_FIXED
       - reinstate ADL-P mmap ioctls
       - drop a bunch of unused by userspace features
       - disable and remove GPU relocations
   - revert some i915 misfeatures
   - major refactoring of GuC for Gen11+
   - execbuffer object locking separate step
   - reject caching/set-domain on discrete
   - Enable pipe DMC loading on XE-LPD and ADL-P
   - add PSF GV point support
   - Refactor and fix DDI buffer translations
   - Clean up FBC CFB allocation code
   - Finish INTEL_GEN() and friends macro conversions

  nouveau:
   - add eDP backlight support
   - implicit fence fix

  msm:
   - a680/7c3 support
   - drm/scheduler conversion

  panfrost:
   - rework GPU reset

  virtio:
   - fix fencing for planes

  ast:
   - add detect support

  bochs:
   - move to tiny GPU driver

  vc4:
   - use hotplug irqs
   - HDMI codec support

  vmwgfx:
   - use internal vmware device headers

  ingenic:
   - demidlayering irq

  rcar-du:
   - shutdown fixes
   - convert to bridge connector helpers

  zynqmp-dsub:
   - misc fixes

  mgag200:
   - convert PLL handling to atomic

  mediatek:
   - MT8133 AAL support
   - gem mmap object support
   - MT8167 support

  etnaviv:
   - NXP Layerscape LS1028A SoC support
   - GEM mmap cleanups

  tegra:
   - new user API

  exynos:
   - missing unlock fix
   - build warning fix
   - use refcount_t"

* tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drm: (1318 commits)
  drm/amd/display: Move AllowDRAMSelfRefreshOrDRAMClockChangeInVblank to bounding box
  drm/amd/display: Remove duplicate dml init
  drm/amd/display: Update bounding box states (v2)
  drm/amd/display: Update number of DCN3 clock states
  drm/amdgpu: disable GFX CGCG in aldebaran
  drm/amdgpu: Clear RAS interrupt status on aldebaran
  drm/amdgpu: Add support for RAS XGMI err query
  drm/amdkfd: Account for SH/SE count when setting up cu masks.
  drm/amdgpu: rename amdgpu_bo_get_preferred_pin_domain
  drm/amdgpu: drop redundant cancel_delayed_work_sync call
  drm/amdgpu: add missing cleanups for more ASICs on UVD/VCE suspend
  drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend
  drm/amdkfd: map SVM range with correct access permission
  drm/amdkfd: check access permisson to restore retry fault
  drm/amdgpu: Update RAS XGMI Error Query
  drm/amdgpu: Add driver infrastructure for MCA RAS
  drm/amd/display: Add Logging for HDMI color depth information
  drm/amd/amdgpu: consolidate PSP TA init shared buf functions
  drm/amd/amdgpu: add name field back to ras_common_if
  drm/amdgpu: Fix build with missing pm_suspend_target_state module export
  ...
</content>
</entry>
<entry>
<title>drm/kmb: Convert to Linux IRQ interfaces</title>
<updated>2021-08-10T18:13:37Z</updated>
<author>
<name>Thomas Zimmermann</name>
<email>tzimmermann@suse.de</email>
</author>
<published>2021-08-03T09:06:56Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=58889cdc39cf456dc097012364a30e84602ec97d'/>
<id>urn:sha1:58889cdc39cf456dc097012364a30e84602ec97d</id>
<content type='text'>
Drop the DRM IRQ midlayer in favor of Linux IRQ interfaces. DRM's
IRQ helpers are mostly useful for UMS drivers. Modern KMS drivers
don't benefit from using it.

DRM IRQ callbacks are now being called directly or inlined.

Signed-off-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Tested-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210803090704.32152-7-tzimmermann@suse.de
</content>
</entry>
<entry>
<title>drm/kmb: Define driver date and major/minor version</title>
<updated>2021-07-29T18:28:48Z</updated>
<author>
<name>Edmund Dea</name>
<email>edmund.j.dea@intel.com</email>
</author>
<published>2020-08-26T20:17:29Z</published>
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<id>urn:sha1:eb92830cdbc232a0e8166c48061ca276132646a7</id>
<content type='text'>
Added macros for date and version

Fixes: 7f7b96a8a0a1 ("drm/kmb: Add support for KeemBay Display")
Signed-off-by: Edmund Dea &lt;edmund.j.dea@intel.com&gt;
Signed-off-by: Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210728003126.1425028-2-anitha.chrisanthus@intel.com
</content>
</entry>
</feed>
