user/sven/linux.git/drivers/gpu, branch v3.8.4

Revert "drm/i915: reorder setup sequence to have irqs for output setup"

2013-03-20T20:10:59Z

Revert commit 2a9810441fcc26cf3f006f015f8a62094fe57a90 which is commit 52d7ecedac3f96fb562cb482c139015372728638 upstream. This caused problems in 3.8-stable, but all is fine in 3.9-rc. Signed-off-by: Greg Kroah-Hartman Cc: Imre Deak Cc: Daniel Vetter

Revert "drm/i915: enable irqs earlier when resuming"

2013-03-20T20:10:59Z

This reverts commit 31f14f4219d2a74b7a6d86c7798f49141b5eccbe which was commit 15239099d7a7a9ecdc1ccb5b187ae4cda5488ff9 upstream. It caused problems in the 3.8-stable series, but 3.9-rc is just fine. Signed-off-by: Greg Kroah-Hartman Cc: Chris Wilson Cc: Mika Kuoppala Cc: Ilya Tumaykin Cc: Daniel Vetter

drm/i915: Turn off hsync and vsync on ADPA when disabling crt

2013-03-14T18:26:24Z

commit f40ebd6bcbbd0d30591f42dc16be52b5086a366b upstream. According to PRM we need to disable hsync and vsync even though ADPA is disabled. The previous code did infact do the opposite so we fix it. Signed-off-by: Patrik Jakobsson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56359 Tested-by: max Signed-off-by: Daniel Vetter Signed-off-by: Greg Kroah-Hartman

drm/i915: enable irqs earlier when resuming

2013-03-14T18:26:24Z

commit 15239099d7a7a9ecdc1ccb5b187ae4cda5488ff9 upstream. We need it to restore the ilk rc6 context, since the gpu wait no requires interrupts. But in general having interrupts around should help in code sanity, since more and more stuff is interrupt driven. This regression has been introduced in commit 3e9605018ab3e333d51cc90fccfde2031886763b Author: Chris Wilson Date: Tue Nov 27 16:22:54 2012 +0000 drm/i915: Rearrange code to only have a single method for waiting upon the ring Like in the driver load code we need to make sure that hotplug interrupts don't cause havoc with our modeset state, hence block them with the existing infrastructure. Again we ignore races where we might loose hotplug interrupts ... Note that the driver load part of the regression has already been fixed in commit 52d7ecedac3f96fb562cb482c139015372728638 Author: Daniel Vetter Date: Sat Dec 1 21:03:22 2012 +0100 drm/i915: reorder setup sequence to have irqs for output setup v2: Add a note to the commit message about which patch fixed the driver load part of the regression. Stable kernels need to backport both patches. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=54691 Cc: Chris Wilson Cc: Mika Kuoppala Reported-and-Tested-by: Ilya Tumaykin Reviewed-by: Chris wilson (v1) Signed-off-by: Daniel Vetter Signed-off-by: Greg Kroah-Hartman

drm/i915: reorder setup sequence to have irqs for output setup

2013-03-14T18:26:24Z

commit 52d7ecedac3f96fb562cb482c139015372728638 upstream. Otherwise the new&shiny irq-driven gmbus and dp aux code won't work that well. Noticed since the dp aux code doesn't have an automatic fallback with a timeout (since the hw provides for that already). v2: Simple move drm_irq_install before intel_modeset_gem_init, as suggested by Ben Widawsky. v3: Now that interrupts are enabled before all connectors are fully set up, we might fall over serving a HPD interrupt while things are still being set up. Instead of jumping through massive hoops and complicating the code with a separate hpd irq enable step, simply block out the hotplug work item from doing anything until things are in place. v4: Actually, we can enable hotplug processing only after the fbdev is fully set up, since we call down into the fbdev from the hotplug work functions. So stick the hpd enabling right next to the poll helper initialization. v5: We need to enable irqs before intel_modeset_init, since that function sets up the outputs. v6: Fixup cleanup sequence, too. Reviewed-by: Imre Deak Signed-off-by: Daniel Vetter Signed-off-by: Greg Kroah-Hartman

drm/i915: Fix Haswell/CRW PCI IDs.

2013-03-14T18:26:23Z

commit 86c268ed0f9b3b4d51d81dd8fcec533a164414d1 upstream. The second digit was off by one, which meant we accidentally treated GT(n) as GT(n-1). This also meant no support for GT1 at all. Signed-off-by: Kenneth Graunke Signed-off-by: Daniel Vetter Signed-off-by: Greg Kroah-Hartman

drm/i915: Increase the RC6p threshold.

2013-03-14T18:26:23Z

commit 0920a48719f1ceefc909387a64f97563848c7854 upstream. This increases GEN6_RC6p_THRESHOLD from 100000 to 150000. For some reason this avoids the gen6_gt_check_fifodbg.isra warnings and associated GPU lockups, which makes my ivy bridge machine stable. Signed-off-by: Stéphane Marchesin Acked-by: Jesse Barnes Signed-off-by: Daniel Vetter Signed-off-by: Greg Kroah-Hartman

drm/radeon: add primary dac adj quirk for R200 board

2013-03-14T18:26:23Z

commit e8fc41377f5037ff7a661ea06adc05f1daec1548 upstream. vbios values are wrong leading to colors that are too bright. Use the default values instead. Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman

drm/radeon: don't set hpd, afmt interrupts when interrupts are disabled

2013-03-14T18:26:23Z

commit cc9945bf9cac03860b2f7d59882263c965c6e3af upstream. Avoids splatter if the interrupt handler is not registered due to acceleration being disabled. Signed-off-by: Alex Deucher Reviewed-by: Jerome Glisse Signed-off-by: Greg Kroah-Hartman

drm/nv50/devinit: reverse the logic for running encoder init scripts

2013-02-28T13:38:43Z

commit ac8cc241a81941932da44993242e68c62e115ec7 upstream. A single U encoder table can match multiple DCB entries, whereas the reverse is not true and can lead to us not matching a DCB entry at all, and fail to initialise some encoders. Signed-off-by: Ben Skeggs Signed-off-by: Greg Kroah-Hartman