user/sven/linux.git/drivers/mailbox, branch v4.19.85

mbox: qcom: add APCS child device for QCS404

2019-10-07T16:57:02Z

[ Upstream commit 78c86458a440ff356073c21b568cb58ddb67b82b ] There is clock controller functionality in the APCS hardware block of qcs404 devices similar to msm8916. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd Signed-off-by: Jassi Brar Signed-off-by: Sasha Levin

mailbox: handle failed named mailbox channel request

2019-07-31T05:27:07Z

[ Upstream commit 25777e5784a7b417967460d4fcf9660d05a0c320 ] Previously, if mbox_request_channel_byname was used with a name which did not exist in the "mbox-names" property of a mailbox client, the mailbox corresponding to the last entry in the "mbox-names" list would be incorrectly selected. With this patch, -EINVAL is returned if the named mailbox is not found. Signed-off-by: Morten Borup Petersen Signed-off-by: Jassi Brar Signed-off-by: Sasha Levin

mailbox: stm32-ipcc: check invalid irq

2019-06-15T09:54:04Z

[ Upstream commit 68a1c8485cf83734d4da9d81cd3b5d2ae7c0339b ] On failure of_irq_get() returns a negative value or zero, which is not handled as an error in the existing implementation. Instead of using this API, use platform_get_irq() that returns exclusively a negative value on failure. Also, do not output an error log in case of defer probe error. Signed-off-by: Fabien Dessenne Signed-off-by: Jassi Brar Signed-off-by: Sasha Levin

mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush timeout issue

2019-03-23T19:09:49Z

[ Upstream commit d7bf31a0f85faaf63c63c39d55154825a1eaaea9 ] RING_CONTROL reg was not written due to wrong address, hence all the subsequent ring flush was timing out. Fixes: a371c10ea4b3 ("mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush sequence") Signed-off-by: Rayagonda Kokatanur Signed-off-by: Ray Jui Reviewed-by: Scott Branden Signed-off-by: Jassi Brar Signed-off-by: Sasha Levin

mailbox: PCC: handle parse error

2018-11-13T19:08:18Z

commit afd0b1fb22269f48d68fdf269891c653818c8047 upstream. acpi_pcc_probe() calls acpi_table_parse_entries_array() but fails to check for an error return. This in turn can result in calling kcalloc() with a negative count as well as emitting the following misleading erorr message: [ 2.642015] Could not allocate space for PCC mbox channels Fixes: 8f8027c5f935 (mailbox: PCC: erroneous error message when parsing ACPI PCCT) Signed-off-by: David Arcari Reviewed-by: Al Stone Cc: 4.18+ # 4.18+ Signed-off-by: Rafael J. Wysocki Signed-off-by: Greg Kroah-Hartman

mailbox: Add support for i.MX messaging unit

2018-08-15T04:23:07Z

The i.MX Messaging Unit is a two side block which allows applications implement communication over this sides. The MU includes the following features: - Messaging control by interrupts or by polling - Four general-purpose interrupt requests reflected to the other side - Three general-purpose flags reflected to the other side - Four receive registers with maskable interrupt - Four transmit registers with maskable interrupt Reviewed-by: Vladimir Zapolskiy Reviewed-by: Dong Aisheng Signed-off-by: Oleksij Rempel Signed-off-by: Jassi Brar

mailbox: add MODULE_LICENSE() for mtk-cmdq-mailbox.c

2018-08-15T04:13:37Z

Fix missing MODULE_LICENSE() in mtk-cmdq-mailbox.c: WARNING: modpost: missing MODULE_LICENSE() in drivers/mailbox/mtk-cmdq-mailbox.o Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver") Signed-off-by: Randy Dunlap Cc: Cc: CK Hu Cc: Houlong Wei Signed-off-by: Jassi Brar

mailbox: mediatek: Add Mediatek CMDQ driver

2018-08-03T14:22:14Z

This patch is first version of Mediatek Command Queue(CMDQ) driver. The CMDQ is used to help write registers with critical time limitation, such as updating display configuration during the vblank. It controls Global Command Engine (GCE) hardware to achieve this requirement. Currently, CMDQ only supports display related hardwares, but we expect it can be extended to other hardwares for future requirements. Signed-off-by: Houlong Wei Signed-off-by: HS Liao Signed-off-by: CK Hu Signed-off-by: Jassi Brar

mailbox: ti-msgmgr: Add support for Secure Proxy

2018-08-03T13:27:41Z

Secure Proxy is another communication scheme in Texas Instrument's devices intended to provide an unique communication path from various processors in the System on Chip(SoC) to a central System Controller. Secure proxy is, in effect, an evolution of current generation Message Manager hardware block found in K2G devices. However the following changes have taken place: Secure Proxy instance exposes "threads" or "proxies" which is primary representation of "a" communication channel. Each thread is preconfigured by System controller configuration based on SoC usage requirements. Secure proxy by itself represents a single "queue" of communication but allows the proxies to be independently operated. Each Secure proxy thread can uniquely have their own error and threshold interrupts allowing for more fine control of IRQ handling. Provide the driver support for Secure Proxy and thread instances. NOTE: Secure proxy configuration is only done by System Controller, hence these are assumed to be pre-configured instances. See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Signed-off-by: Nishanth Menon Signed-off-by: Jassi Brar

mailbox: ti-msgmgr: Move the memory region name to descriptor

2018-08-03T13:27:41Z

For newer generation of the hardware, the naming of the region is decided at integration level and there could be additional regions as well. Hence move the region naming to be described from compatible descriptor. Signed-off-by: Nishanth Menon Signed-off-by: Jassi Brar