<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/mtd, branch v5.5</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.5</id>
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<updated>2020-01-17T21:45:09Z</updated>
<entry>
<title>mtd: rawnand: gpmi: Restore nfc timing setup after suspend/resume</title>
<updated>2020-01-17T21:45:09Z</updated>
<author>
<name>Esben Haabendal</name>
<email>esben@geanix.com</email>
</author>
<published>2020-01-17T20:05:37Z</published>
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<id>urn:sha1:d70486668cdf51b14a50425ab45fc18677a167b2</id>
<content type='text'>
As we reset the GPMI block at resume, the timing parameters setup by a
previous exec_op is lost.  Rewriting GPMI timing registers on first exec_op
after resume fixes the problem.

Fixes: ef347c0cfd61 ("mtd: rawnand: gpmi: Implement exec_op")
Cc: stable@vger.kernel.org
Signed-off-by: Esben Haabendal &lt;esben@geanix.com&gt;
Acked-by: Han Xu &lt;han.xu@nxp.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: rawnand: gpmi: Fix suspend/resume problem</title>
<updated>2020-01-17T21:45:07Z</updated>
<author>
<name>Esben Haabendal</name>
<email>esben@geanix.com</email>
</author>
<published>2020-01-17T20:05:36Z</published>
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<id>urn:sha1:5bc6bb603b4d0c8802af75e4932232683ab2d761</id>
<content type='text'>
On system resume, the gpmi clock must be enabled before accessing gpmi
block.  Without this, resume causes something like

[  661.348790] gpmi_reset_block(5cbb0f7e): module reset timeout
[  661.348889] gpmi-nand 1806000.gpmi-nand: Error setting GPMI : -110
[  661.348928] PM: dpm_run_callback(): platform_pm_resume+0x0/0x44 returns -110
[  661.348961] PM: Device 1806000.gpmi-nand failed to resume: error -110

Fixes: ef347c0cfd61 ("mtd: rawnand: gpmi: Implement exec_op")
Cc: stable@vger.kernel.org
Signed-off-by: Esben Haabendal &lt;esben@geanix.com&gt;
Acked-by: Han Xu &lt;han.xu@nxp.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Fix quad enable for Spansion like flashes</title>
<updated>2020-01-17T21:45:05Z</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2020-01-16T09:37:00Z</published>
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<id>urn:sha1:da2ef8124f20b4ce18d1d3d24fc7b88e687e10bb</id>
<content type='text'>
The commit 7b678c69c0ca ("mtd: spi-nor: Merge spansion Quad Enable
methods") forgot to actually set the QE bit in some cases. Thus this
breaks quad mode accesses to flashes which support readback of the
status register-2. Fix it.

Fixes: 7b678c69c0ca ("mtd: spi-nor: Merge spansion Quad Enable methods")
Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Fix selection of 4-byte addressing opcodes on Spansion</title>
<updated>2020-01-17T21:44:49Z</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2020-01-08T05:13:43Z</published>
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<id>urn:sha1:440b6d50254bdbd84c2a665c7f53ec69dd741a4f</id>
<content type='text'>
mtd-&gt;size is still unassigned when running spansion_post_sfdp_fixups()
hook, therefore use nor-&gt;params.size to determine the size of flash device.

This makes sure that 4-byte addressing opcodes are used on Spansion
flashes that are larger than 16MiB and don't have SFDP 4BAIT table
populated.

Fixes: 92094ebc385e ("mtd: spi-nor: Add spansion_post_sfdp_fixups()")
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Reviewed-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi-nor: Fix the writing of the Status Register on micron flashes</title>
<updated>2020-01-09T19:11:34Z</updated>
<author>
<name>Tudor Ambarus</name>
<email>tudor.ambarus@microchip.com</email>
</author>
<published>2019-12-03T14:50:01Z</published>
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<id>urn:sha1:82de6a6fb67e16a30ec2f586b1f6976c2d7b4b62</id>
<content type='text'>
Micron flashes do not support 16 bit writes on the Status Register.
According to micron datasheets, when using the Write Status Register
(01h) command, the chip select should be driven LOW and held LOW until
the eighth bit of the last data byte has been latched in, after which
it must be driven HIGH. If CS is not driven HIGH, the command is not
executed, flag status register error bits are not set, and the write enable
latch remains set to 1. This fixes the lock operations on micron flashes.

Reported-by: John Garry &lt;john.garry@huawei.com&gt;
Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()")
Signed-off-by: Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;
Tested-by: John Garry &lt;john.garry@huawei.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: sm_ftl: fix NULL pointer warning</title>
<updated>2020-01-09T19:09:55Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2020-01-07T21:24:52Z</published>
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<id>urn:sha1:de08b5ac10420db597cb24c41b4d8d06cce15ffd</id>
<content type='text'>
With gcc -O3, we get a new warning:

In file included from arch/arm64/include/asm/processor.h:28,
                 from drivers/mtd/sm_ftl.c:8:
In function 'memset',
    inlined from 'sm_read_sector.constprop' at drivers/mtd/sm_ftl.c:250:3:
include/linux/string.h:411:9: error: argument 1 null where non-null expected [-Werror=nonnull]
  return __builtin_memset(p, c, size);

&gt;From all I can tell, this cannot happen (the function is called
either with a NULL buffer or with a -1 block number but not both),
but adding a check makes it more robust and avoids the warning.

Fixes: mmtom ("init/Kconfig: enable -O3 for all arches")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: onenand: omap2: Pass correct flags for prep_dma_memcpy</title>
<updated>2020-01-09T19:09:29Z</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@ti.com</email>
</author>
<published>2020-01-07T08:45:44Z</published>
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<id>urn:sha1:8bcef0d54067077cf9a6cb129022c77559926e8c</id>
<content type='text'>
The commit converting the driver to DMAengine was missing the flags for
the memcpy prepare call.
It went unnoticed since the omap-dma driver was ignoring them.

Fixes: 3ed6a4d1de2c5 (" mtd: onenand: omap2: Convert to use dmaengine for memcp")
Reported-by: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Tested-by: H. Nikolaus Schaller &lt;hns@goldelico.com&gt;
Tested-by: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: onenand: samsung: Fix iomem access with regular memcpy</title>
<updated>2020-01-09T19:09:05Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2020-01-03T16:41:58Z</published>
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<id>urn:sha1:14ebf24175df0f216256c8483ee2974f35a1a89c</id>
<content type='text'>
The __iomem memory should be copied with memcpy_fromio.  This fixes
Sparse warnings like:

    drivers/mtd/nand/onenand/samsung_mtd.c:678:40: warning: incorrect type in argument 2 (different address spaces)
    drivers/mtd/nand/onenand/samsung_mtd.c:678:40:    expected void const *from
    drivers/mtd/nand/onenand/samsung_mtd.c:678:40:    got void [noderef] &lt;asn:2&gt; *[assigned] p
    drivers/mtd/nand/onenand/samsung_mtd.c:679:19: warning: incorrect type in assignment (different address spaces)
    drivers/mtd/nand/onenand/samsung_mtd.c:679:19:    expected void [noderef] &lt;asn:2&gt; *[assigned] p
    drivers/mtd/nand/onenand/samsung_mtd.c:679:19:    got unsigned char *

Reported-by: kbuild test robot &lt;lkp@intel.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: onenand: omap2: Fix errors in style</title>
<updated>2020-01-09T19:08:15Z</updated>
<author>
<name>Amir Mahdi Ghorbanian</name>
<email>indigoomega021@gmail.com</email>
</author>
<published>2020-01-02T17:10:08Z</published>
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<id>urn:sha1:44f45994f438b4f4e0ba977b173980268983c60f</id>
<content type='text'>
Correct mispelling, spacing, and coding style flaws caught by
checkpatch.pl script in the Omap2 Onenand driver .

Signed-off-by: Amir Mahdi Ghorbanian &lt;indigoomega021@gmail.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
<entry>
<title>mtd: cadence: Fix cast to pointer from integer of different size warning</title>
<updated>2020-01-09T19:05:15Z</updated>
<author>
<name>Vasyl Gomonovych</name>
<email>gomonovych@gmail.com</email>
</author>
<published>2019-12-18T09:57:15Z</published>
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<id>urn:sha1:4aa906f1859614842818dc3b4cb5b27bc35961e2</id>
<content type='text'>
Use dma_addr_t type to pass memory address and control data in
DMA descriptor fields memory_pointer and ctrl_data_ptr
To fix warning: cast to pointer from integer of different size

Signed-off-by: Vasyl Gomonovych &lt;gomonovych@gmail.com&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
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