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<title>user/sven/linux.git/drivers/net/phy/Makefile, branch v3.18.48</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v3.18.48</id>
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<updated>2014-08-28T05:59:39Z</updated>
<entry>
<title>net: phy: add generic UniMAC MDIO bus driver</title>
<updated>2014-08-28T05:59:39Z</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2014-08-28T00:04:47Z</published>
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<id>urn:sha1:2ba1b163c9d5d716fb1061f3fb76832cc6eea37f</id>
<content type='text'>
Add a generic UniMAC MDIO bus driver and its Device Tree binding, which
can be used by the BCMGENET driver as-is, and the upcoming Starfighter 2
Ethernet switch MDIO bus controller.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>amd-xgbe: Configuration and build support</title>
<updated>2014-06-05T22:26:51Z</updated>
<author>
<name>Lendacky, Thomas</name>
<email>Thomas.Lendacky@amd.com</email>
</author>
<published>2014-06-05T14:15:18Z</published>
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<id>urn:sha1:1ebe98dcd89c624d08a3712a8a9f1706bf213172</id>
<content type='text'>
This patch provides the Kconfig and Makefile changes needed
to configure and build the AMD 10GbE platform driver and the
AMD 10GbE phylib driver.

Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: phy: add Broadcom BCM7xxx internal PHY driver</title>
<updated>2014-02-14T05:27:58Z</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2014-02-14T00:08:45Z</published>
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<id>urn:sha1:b560a58c45c66f68936127040e86b7f02e4c5332</id>
<content type='text'>
This patch adds support for the Broadcom BCM7xxx Set Top Box SoCs
internal PHYs. This driver supports the following generation of SoCs:

- BCM7366, BCM7439, BCM7445 (28nm process)
- all 40nm and 65nm (older MIPS-based SoCs)

The PHYs on these SoCs require a bunch of workarounds to operate
correctly, both during configuration time and at suspend/resume time,
the driver handles that for us.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy: Add MOXA MDIO driver</title>
<updated>2013-11-07T20:37:09Z</updated>
<author>
<name>Jonas Jensen</name>
<email>jonas.jensen@gmail.com</email>
</author>
<published>2013-11-05T15:55:01Z</published>
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<id>urn:sha1:b0db7b0c21a014d01be1018db68e78ebf7d4f0d7</id>
<content type='text'>
The MOXA UC-711X hardware(s) has an ethernet controller that seem
to be developed internally. The IC used is "RTL8201CP".

This patch adds an MDIO driver which handles the MII bus.

Signed-off-by: Jonas Jensen &lt;jonas.jensen@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: Add MDIO bus driver for the Allwinner EMAC</title>
<updated>2013-06-01T00:23:07Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-05-30T03:49:21Z</published>
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<id>urn:sha1:4bdcb1dd9feb03608e12cfa46aba385035af8ea5</id>
<content type='text'>
This patch adds a separate driver for the MDIO interface of the
Allwinner ethernet controllers.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Tested-by: Richard Genoud &lt;richard.genoud@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>phy: add AT803x driver</title>
<updated>2012-10-18T19:34:30Z</updated>
<author>
<name>Matus Ujhelyi</name>
<email>ujhelyi.m@gmail.com</email>
</author>
<published>2012-10-14T19:07:16Z</published>
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<id>urn:sha1:0ca7111a38f053ae7b8829ee32fca6f9ef47550a</id>
<content type='text'>
This driver add support for wake over lan on AT803x phys.

Signed-off-by: Matus Ujhelyi &lt;ujhelyi.m@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>netdev/phy: add MDIO bus multiplexer driven by a memory-mapped device</title>
<updated>2012-08-30T16:54:48Z</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2012-08-24T09:10:53Z</published>
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<id>urn:sha1:6cc2ff82492d89f763e69ea6b8681926aceda610</id>
<content type='text'>
Add support for an MDIO bus multiplexer controlled by a simple memory-mapped
device, like an FPGA.  The device must be memory-mapped and contain only
8-bit registers (which keeps things simple).

Tested on a Freescale P5020DS board which uses the "PIXIS" FPGA attached
to the localbus.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>netdev/phy: Add driver for Broadcom BCM87XX 10G Ethernet PHYs</title>
<updated>2012-06-28T04:23:25Z</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2012-06-27T07:33:38Z</published>
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<id>urn:sha1:e9976d7c96423ac1991396aa82335206ded55bcf</id>
<content type='text'>
Add a driver for BCM8706 and BCM8727 devices.  These are a 10Gig PHYs
which use MII_ADDR_C45 addressing.  They are always 10G full duplex, so
there is no autonegotiation.  All we do is report link state and send
interrupts when it changes.

If the PHY has a device tree of_node associated with it, the
"broadcom,c45-reg-init" property is used to supply register
initialization values when config_init() is called.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>netdev/of/phy: Add MDIO bus multiplexer driven by GPIO lines.</title>
<updated>2012-05-08T02:58:09Z</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2012-05-02T15:16:39Z</published>
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<id>urn:sha1:416912a129349788372e6ac27ab86bd9b18c8cc0</id>
<content type='text'>
The GPIO pins select which sub bus is connected to the master.

Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>netdev/of/phy: Add MDIO bus multiplexer support.</title>
<updated>2012-05-08T02:58:09Z</updated>
<author>
<name>David Daney</name>
<email>david.daney@cavium.com</email>
</author>
<published>2012-05-02T15:16:38Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=0ca2997d145268e6b4ef000692061849cdab8348'/>
<id>urn:sha1:0ca2997d145268e6b4ef000692061849cdab8348</id>
<content type='text'>
This patch adds a somewhat generic framework for MDIO bus
multiplexers.  It is modeled on the I2C multiplexer.

The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient electrical drive capability for all the connected PHY
devices.

Conceptually it could look something like this:

                   ------------------
                   | Control Signal |
                   --------+---------
                           |
 ---------------   --------+------
 | MDIO MASTER |---| Multiplexer |
 ---------------   --+-------+----
                     |       |
                     C       C
                     h       h
                     i       i
                     l       l
                     d       d
                     |       |
     ---------       A       B   ---------
     |       |       |       |   |       |
     | PHY@1 +-------+       +---+ PHY@1 |
     |       |       |       |   |       |
     ---------       |       |   ---------
     ---------       |       |   ---------
     |       |       |       |   |       |
     | PHY@2 +-------+       +---+ PHY@2 |
     |       |                   |       |
     ---------                   ---------

This framework configures the bus topology from device tree data.  The
mechanics of switching the multiplexer is left to device specific
drivers.

The follow-on patch contains a multiplexer driven by GPIO lines.

Signed-off-by: David Daney &lt;david.daney@cavium.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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