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<title>user/sven/linux.git/drivers/nvmem, branch v4.10.16</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.10.16</id>
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<updated>2017-01-04T17:22:47Z</updated>
<entry>
<title>nvmem: fix nvmem_cell_read() return type doc</title>
<updated>2017-01-04T17:22:47Z</updated>
<author>
<name>Brian Norris</name>
<email>briannorris@chromium.org</email>
</author>
<published>2017-01-04T16:18:11Z</published>
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<id>urn:sha1:b577fafc4366eb82334518c552912652328c74fa</id>
<content type='text'>
nvmem_cell_read() returns void *, not char *. This is a cleanup that got
left out of commit a6c50912508d ("nvmem: Declare nvmem_cell_read()
consistently").

Signed-off-by: Brian Norris &lt;briannorris@chromium.org&gt;
Fixes: a6c50912508d ("nvmem: Declare nvmem_cell_read() consistently")
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: imx-ocotp: Fix wrong register size</title>
<updated>2017-01-04T17:22:47Z</updated>
<author>
<name>Daniel Schultz</name>
<email>d.schultz@phytec.de</email>
</author>
<published>2017-01-04T16:18:10Z</published>
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<id>urn:sha1:14ba972842f9e84e6d3264bc0302101b8a792288</id>
<content type='text'>
All i.MX6 SoCs have an OCOTP Controller with 4kbit fuses. The i.MX6SL is
an exception and has only 2kbit fuses.

In the TRM for the i.MX6DQ (IMX6QDRM - Rev 2, 06/2014) the fuses size is
described in chapter 46.1.1 with:
"32-bit word restricted program and read to 4Kbits of eFuse OTP(512x8)."

In the TRM for the i.MX6SL (IMX6SLRM - Rev 2, 06/2015) the fuses size is
described in chapter 34.1.1 with:
"32-bit word restricted program and read to 2 kbit of eFuse OTP(128x8)."

Since the Freescale Linux kernel OCOTP driver works with a fuses size of
2 kbit for the i.MX6SL, it looks like the TRM is wrong and the formula
to calculate the correct fuses size has to be 256x8.

Signed-off-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: qfprom: Allow single byte accesses for read/write</title>
<updated>2017-01-04T17:22:47Z</updated>
<author>
<name>Vivek Gautam</name>
<email>vivek.gautam@codeaurora.org</email>
</author>
<published>2017-01-04T16:18:09Z</published>
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<id>urn:sha1:01d0d2c42a14cee8f619d3e9d571ce3469f5ef51</id>
<content type='text'>
The nvmem core driver supports to read and write single
byte. So, allow qfprom to support this feature.
This change helps in extracting a required value based
on bit-offset and number of bits for the required value
in the nvmem cell.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Cc: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: Add the Broadcom OTP controller driver</title>
<updated>2016-11-10T14:34:56Z</updated>
<author>
<name>Jonathan Richardson</name>
<email>jonathar@broadcom.com</email>
</author>
<published>2016-10-31T14:45:19Z</published>
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<id>urn:sha1:9d59c6e8ae27638fc733fe759b1a013775e745ee</id>
<content type='text'>
Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP
controller. These controllers are used on SoC's such as Cygnus and
Stingray.

Reviewed-by: Ray Jui &lt;ray.jui@broadcom.com&gt;
Tested-by: Jonathan Richardson &lt;jonathan.richardson@broadcom.com&gt;
Signed-off-by: Scott Branden &lt;scott.branden@broadcom.com&gt;
Signed-off-by: Oza Pawandeep &lt;oza@broadcom.com&gt;
Signed-off-by: Jonathan Richardson &lt;jonathan.richardson@broadcom.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: add NXP LPC18xx OTP driver</title>
<updated>2016-11-10T14:34:55Z</updated>
<author>
<name>Joachim Eastwood</name>
<email>manabian@gmail.com</email>
</author>
<published>2016-10-31T14:45:16Z</published>
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<id>urn:sha1:88806daf10f4eeaf7d5b41f360e37592bd9a759c</id>
<content type='text'>
Add simple read only driver for the internal OTP (One Time Programmable)
memory found on all NXP LPC18xx and LPC43xx devices.

The OTP memory is split into 4 banks each with 4 32-bits word. Some of
the banks contain predefined data while others are for general purpose
and user programmable via the OTP API in ROM. Note that writing to the
OTP memory is not yet supported.

Signed-off-by: Joachim Eastwood &lt;manabian@gmail.com&gt;
Tested-by: Vladimir Zapolskiy &lt;vz@mleia.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2016-10-08T04:23:40Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-10-08T04:23:40Z</published>
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<id>urn:sha1:6afd563d4bbc1924b7de9e053324c007e0d36476</id>
<content type='text'>
Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs, including a couple of newly added
  drivers:

   - The Qualcomm external bus interface 2 (EBI2), used in some of their
     mobile phone chips for connecting flash memory, LCD displays or
     other peripherals

   - Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for
     the EFUSE based on that firmware interface.

   - Perf support for the AppliedMicro X-Gene performance monitor unit

   - Reset driver for STMicroelectronics STM32

   - Reset driver for SocioNext UniPhier SoCs

  Aside from these, there are minor updates to SoC-specific bus,
  clocksource, firmware, pinctrl, reset, rtc and pmic drivers"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
  bus: qcom-ebi2: depend on HAS_IOMEM
  pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
  clk: mvebu: Add clk support for the orion5x SoC mv88f5181
  dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
  clocksource: exynos_mct: Add the support for ARM64
  perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver
  Documentation: Add documentation for APM X-Gene SoC PMU DTS binding
  MAINTAINERS: Add entry for APM X-Gene SoC PMU driver
  bus: qcom: add EBI2 driver
  bus: qcom: add EBI2 device tree bindings
  rtc: rtc-pm8xxx: Add support for pm8018 rtc
  nvmem: amlogic: Add Amlogic Meson EFUSE driver
  firmware: Amlogic: Add secure monitor driver
  soc: qcom: smd: Reset rx tail rather than tx
  memory: atmel-sdramc: fix a possible NULL dereference
  reset: hi6220: allow to compile test driver on other architectures
  reset: zynq: add driver Kconfig option
  reset: sunxi: add driver Kconfig option
  reset: stm32: add driver Kconfig option
  reset: socfpga: add driver Kconfig option
  ...
</content>
</entry>
<entry>
<title>nvmem: rockchip-efuse: add rk3399-efuse support</title>
<updated>2016-09-02T15:22:51Z</updated>
<author>
<name>Finley Xiao</name>
<email>finley.xiao@rock-chips.com</email>
</author>
<published>2016-09-02T09:14:27Z</published>
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<id>urn:sha1:02baff325462cc7e81241b21959c5e62e7ca575e</id>
<content type='text'>
1) the efuse timing of rk3399 is different from earlier SoCs.
2) rk3399-efuse is organized as 32bits by 32 one-time programmable
electrical fuses, the efuse of earlier SoCs is organized as 32bits
by 8 one-time programmable electrical fuses with random access interface.

This patch adds a new read function for rk3399-efuse.

Signed-off-by: Finley Xiao &lt;finley.xiao@rock-chips.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: amlogic: Add Amlogic Meson EFUSE driver</title>
<updated>2016-09-01T21:24:21Z</updated>
<author>
<name>Carlo Caione</name>
<email>carlo@endlessm.com</email>
</author>
<published>2016-08-27T13:43:46Z</published>
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<id>urn:sha1:ad855eae6caf0d1dd17bce5bcd8e07759adc9903</id>
<content type='text'>
Add Amlogic EFUSE driver to access hardware data like ethernet address,
serial number or IDs.

Acked-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Carlo Caione &lt;carlo@endlessm.com&gt;
Signed-off-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
</content>
</entry>
<entry>
<title>nvmem: imx-ocotp: Fix assignment warning.</title>
<updated>2016-06-25T14:42:55Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2016-06-02T11:19:44Z</published>
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<id>urn:sha1:e2402b1d214e5d50e807773563d590115a161f45</id>
<content type='text'>
This patch fixes below error if the driver is compiled with 64 bit
machine configuration.

"drivers/nvmem/imx-ocotp.c:102:14: warning: assignment makes integer
from pointer without a cast"

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: imx-ocotp: add COMPILE_TEST for proper test coverage</title>
<updated>2016-06-25T14:42:55Z</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2016-06-02T11:19:43Z</published>
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<id>urn:sha1:63c0c076e590ed83050c80ada2e82adeac9de126</id>
<content type='text'>
This patch add COMPILE_TEST to imx-ocotp driver so that it can be
compile tested on other platforms with zero day testing.
Also adds HAS_IOMEM dependancy as the users of devm_ioremap_resource()
which are compile-testable should depend on HAS_IOMEM.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
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