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<title>user/sven/linux.git/drivers/nvmem, branch v4.16.14</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.16.14</id>
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<updated>2018-01-02T13:46:35Z</updated>
<entry>
<title>Merge 4.15-rc6 into char-misc-next</title>
<updated>2018-01-02T13:46:35Z</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2018-01-02T13:46:35Z</published>
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<id>urn:sha1:b6a09416e83ffe4eccfb4ef1b91b3b66483fa810</id>
<content type='text'>
We want the fixes in here as well.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: meson-mx-efuse: fix reading from an offset other than 0</title>
<updated>2017-12-23T15:46:23Z</updated>
<author>
<name>Martin Blumenstingl</name>
<email>martin.blumenstingl@googlemail.com</email>
</author>
<published>2017-12-15T13:42:04Z</published>
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<id>urn:sha1:8a42d3fc9dfccbf601c5f58f46dc3cdbc1a4b923</id>
<content type='text'>
meson_mx_efuse_read calculates the address internal to the eFuse based
on the offset and the word size. This works fine with any given offset.
However, the offset is also included when writing to the output buffer.
This means that reading 4 bytes at offset 500 tries to write beyond the
array allocated by the nvmem core as it wants to write the 4 bytes to
"buffer address + offset (500)".
This issue did not show up in the previous tests since no driver uses
any value from the eFuse yet and reading the eFuse via sysfs simply
reads the whole eFuse, starting at offset 0.

Fix this by only including the offset in the internal address
calculation.

Fixes: 8caef1fa9176 ("nvmem: add a driver for the Amlogic Meson6/Meson8/Meson8b SoCs")
Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: rockchip-efuse: add support for rk3328-efuse</title>
<updated>2017-12-19T09:39:33Z</updated>
<author>
<name>Finley Xiao</name>
<email>finley.xiao@rock-chips.com</email>
</author>
<published>2017-12-15T14:06:09Z</published>
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<id>urn:sha1:9a479b0853bc39e5d9d77adc9b8da167951446e9</id>
<content type='text'>
This adds the necessary data for handling eFuse on the rk3328.

Signed-off-by: Finley Xiao &lt;finley.xiao@rock-chips.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: rockchip-efuse: parse 'rockchip,efuse-size'</title>
<updated>2017-12-19T09:39:33Z</updated>
<author>
<name>Finley Xiao</name>
<email>finley.xiao@rock-chips.com</email>
</author>
<published>2017-12-15T14:06:08Z</published>
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<id>urn:sha1:32277723ba7e9af0201df2341a3e71ea27605759</id>
<content type='text'>
The eFuse size is defined in property &lt;reg&gt; before, but the length
of registers is not equal to the size on some platforms, so we
add a new property to redefine it.

Signed-off-by: Finley Xiao &lt;finley.xiao@rock-chips.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: uniphier: change access unit from 32bit to 8bit</title>
<updated>2017-12-19T09:39:33Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2017-12-15T14:06:07Z</published>
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<id>urn:sha1:683618b0639387c5eda79b2f2753c35f3dd648d7</id>
<content type='text'>
The efuse on UniPhier allows 8bit access according to the specification.
Since bit offset of nvmem is limited to 0-7, it is desiable to change
access unit of nvmem to 8bit.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: core: switch to device_property_present for reading property "read-only"</title>
<updated>2017-12-19T09:39:33Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2017-12-15T14:06:06Z</published>
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<id>urn:sha1:fc2f997035fef8463abcf8a0a1f3d92c7c6fdf0a</id>
<content type='text'>
Switch to more generic device_property_present to consider also non-DT
properties.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: core: let stride and word_size default to 1</title>
<updated>2017-12-19T09:39:33Z</updated>
<author>
<name>Heiner Kallweit</name>
<email>hkallweit1@gmail.com</email>
</author>
<published>2017-12-15T14:06:05Z</published>
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<id>urn:sha1:99897efd5aa0e9671946297ede45840bc2052c07</id>
<content type='text'>
If the caller doesn't set stride and/or word_size in struct nvmem_config
then nvmem_register accepts this but we may face strange effects later
due to both values being 0. Therefore use 1 as default for both values.

Signed-off-by: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvmem: core: Deduplicate bus_find_device() by name matching</title>
<updated>2017-12-19T09:39:33Z</updated>
<author>
<name>Lukas Wunner</name>
<email>lukas@wunner.de</email>
</author>
<published>2017-12-15T14:06:04Z</published>
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<id>urn:sha1:9f3044c38c84989c37a6f29683a8899a2980341d</id>
<content type='text'>
No need to reinvent the wheel, we have bus_find_device_by_name().

Signed-off-by: Lukas Wunner &lt;lukas@wunner.de&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'char-misc-4.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc</title>
<updated>2017-11-16T17:10:59Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-11-16T17:10:59Z</published>
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<id>urn:sha1:2bf16b7a73caf3435f782e4170cfe563675e10f9</id>
<content type='text'>
Pull char/misc updates from Greg KH:
 "Here is the big set of char/misc and other driver subsystem patches
  for 4.15-rc1.

  There are small changes all over here, hyperv driver updates, pcmcia
  driver updates, w1 driver updats, vme driver updates, nvmem driver
  updates, and lots of other little one-off driver updates as well. The
  shortlog has the full details.

  All of these have been in linux-next for quite a while with no
  reported issues"

* tag 'char-misc-4.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (90 commits)
  VME: Return -EBUSY when DMA list in use
  w1: keep balance of mutex locks and refcnts
  MAINTAINERS: Update VME subsystem tree.
  nvmem: sunxi-sid: add support for A64/H5's SID controller
  nvmem: imx-ocotp: Update module description
  nvmem: imx-ocotp: Enable i.MX7D OTP write support
  nvmem: imx-ocotp: Add i.MX7D timing write clock setup support
  nvmem: imx-ocotp: Move i.MX6 write clock setup to dedicated function
  nvmem: imx-ocotp: Add support for banked OTP addressing
  nvmem: imx-ocotp: Pass parameters via a struct
  nvmem: imx-ocotp: Restrict OTP write to IMX6 processors
  nvmem: uniphier: add UniPhier eFuse driver
  dt-bindings: nvmem: add description for UniPhier eFuse
  nvmem: set nvmem-&gt;owner to nvmem-&gt;dev-&gt;driver-&gt;owner if unset
  nvmem: qfprom: fix different address space warnings of sparse
  nvmem: mtk-efuse: fix different address space warnings of sparse
  nvmem: mtk-efuse: use stack for nvmem_config instead of malloc'ing it
  nvmem: imx-iim: use stack for nvmem_config instead of malloc'ing it
  thunderbolt: tb: fix use after free in tb_activate_pcie_devices
  MAINTAINERS: Add git tree for Thunderbolt development
  ...
</content>
</entry>
<entry>
<title>nvmem: sunxi-sid: add support for A64/H5's SID controller</title>
<updated>2017-11-08T13:19:06Z</updated>
<author>
<name>Icenowy Zheng</name>
<email>icenowy@aosc.io</email>
</author>
<published>2017-10-24T09:54:34Z</published>
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<id>urn:sha1:b7fe57b802c4f12da20920229acb9fff92300ad4</id>
<content type='text'>
Allwinner A64/H5 SoCs come with a SID controller like the one in H3, but
without the silicon bug that makes the initial value at 0x200 wrong, so
the value at 0x200 can be directly read.

Add support for this kind of SID controller.

Signed-off-by: Icenowy Zheng &lt;icenowy@aosc.io&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
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