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<title>user/sven/linux.git/drivers/perf, branch v4.16.10</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.16.10</id>
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<updated>2018-02-28T14:59:47Z</updated>
<entry>
<title>arm_pmu: Use disable_irq_nosync when disabling SPI in CPU teardown hook</title>
<updated>2018-02-28T14:59:47Z</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2018-02-26T16:10:56Z</published>
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<id>urn:sha1:b08e5fd90bfc7553d36fa42a03fb7f5e82d252eb</id>
<content type='text'>
Commit 6de3f79112cc ("arm_pmu: explicitly enable/disable SPIs at hotplug")
moved all of the arm_pmu IRQ enable/disable calls to the CPU hotplug hooks,
regardless of whether they are implemented as PPIs or SPIs. This can
lead to us sleeping from atomic context due to disable_irq blocking:

 | BUG: sleeping function called from invalid context at kernel/irq/manage.c:112
 | in_atomic(): 1, irqs_disabled(): 128, pid: 15, name: migration/1
 | no locks held by migration/1/15.
 | irq event stamp: 192
 | hardirqs last  enabled at (191): [&lt;00000000803c2507&gt;]
 | _raw_spin_unlock_irq+0x2c/0x4c
 | hardirqs last disabled at (192): [&lt;000000007f57ad28&gt;] multi_cpu_stop+0x9c/0x140
 | softirqs last  enabled at (0): [&lt;0000000004ee1b58&gt;]
 | copy_process.isra.77.part.78+0x43c/0x1504
 | softirqs last disabled at (0): [&lt;          (null)&gt;]           (null)
 | CPU: 1 PID: 15 Comm: migration/1 Not tainted 4.16.0-rc3-salvator-x #1651
 | Hardware name: Renesas Salvator-X board based on r8a7796 (DT)
 | Call trace:
 |  dump_backtrace+0x0/0x140
 |  show_stack+0x14/0x1c
 |  dump_stack+0xb4/0xf0
 |  ___might_sleep+0x1fc/0x218
 |  __might_sleep+0x70/0x80
 |  synchronize_irq+0x40/0xa8
 |  disable_irq+0x20/0x2c
 |  arm_perf_teardown_cpu+0x80/0xac

Since the interrupt is always CPU-affine and this code is running with
interrupts disabled, we can just use disable_irq_nosync as we know there
isn't a concurrent invocation of the handler to worry about.

Fixes: 6de3f79112cc ("arm_pmu: explicitly enable/disable SPIs at hotplug")
Reported-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Tested-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm_pmu: acpi: request IRQs up-front</title>
<updated>2018-02-20T11:34:54Z</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2017-10-09T16:09:05Z</published>
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<id>urn:sha1:167e61438da0664cab87c825a6c0cb83510d578e</id>
<content type='text'>
We can't request IRQs in atomic context, so for ACPI systems we'll have
to request them up-front, and later associate them with CPUs.

This patch reorganises the arm_pmu code to do so. As we no longer have
the arm_pmu structure at probe time, a number of prototypes need to be
adjusted, requiring changes to the common arm_pmu code and arm_pmu
platform code.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm_pmu: note IRQs and PMUs per-cpu</title>
<updated>2018-02-20T11:34:54Z</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2017-12-12T16:56:06Z</published>
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<id>urn:sha1:84b4be57ae17f8c0b3c1d8629e10f23910838fd7</id>
<content type='text'>
To support ACPI systems, we need to request IRQs before we know the
associated PMU, and thus we need some percpu variable that the IRQ
handler can find the PMU from.

As we're going to request IRQs without the PMU, we can't rely on the
arm_pmu::active_irqs mask, and similarly need to track requested IRQs
with a percpu variable.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
[will: made armpmu_count_irq_users static]
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm_pmu: explicitly enable/disable SPIs at hotplug</title>
<updated>2018-02-20T11:34:54Z</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2018-02-05T16:42:00Z</published>
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<id>urn:sha1:6de3f79112cc26bf24edbb240248d21e1dd85dde</id>
<content type='text'>
To support ACPI systems, we need to request IRQs before CPUs are
hotplugged, and thus we need to request IRQs before we know their
associated PMU.

This is problematic if a PMU IRQ is pending out of reset, as it may be
taken before we know the PMU, and thus the IRQ handler won't be able to
handle it, leaving it screaming.

To avoid such problems, lets request all IRQs in a disabled state, and
explicitly enable/disable them at hotplug time, when we're sure the PMU
has been probed.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm_pmu: acpi: check for mismatched PPIs</title>
<updated>2018-02-20T11:34:54Z</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2018-02-05T16:41:59Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=43fc9a2febbd96dd39588d67ace456b7bbc73d9f'/>
<id>urn:sha1:43fc9a2febbd96dd39588d67ace456b7bbc73d9f</id>
<content type='text'>
The arm_pmu platform code explicitly checks for mismatched PPIs at probe
time, while the ACPI code leaves this to the core code. Future
refactoring will make this difficult for the core code to check, so
let's have the ACPI code check this explicitly.

As before, upon a failure we'll continue on without an interrupt. Ho
hum.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm_pmu: add armpmu_alloc_atomic()</title>
<updated>2018-02-20T11:34:54Z</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2018-02-05T16:41:58Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=0dc1a1851af1d593eee248b94c1277c7c7ccbbce'/>
<id>urn:sha1:0dc1a1851af1d593eee248b94c1277c7c7ccbbce</id>
<content type='text'>
In ACPI systems, we don't know the makeup of CPUs until we hotplug them
on, and thus have to allocate the PMU datastructures at hotplug time.
Thus, we must use GFP_ATOMIC allocations.

Let's add an armpmu_alloc_atomic() that we can use in this case.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm_pmu: fold platform helpers into platform code</title>
<updated>2018-02-20T11:34:53Z</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2018-02-05T16:41:57Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=d3d5aac206b4e9e569a22fe1811c909dde17587c'/>
<id>urn:sha1:d3d5aac206b4e9e569a22fe1811c909dde17587c</id>
<content type='text'>
The armpmu_{request,free}_irqs() helpers are only used by
arm_pmu_platform.c, so let's fold them in and make them static.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm_pmu: kill arm_pmu_platdata</title>
<updated>2018-02-20T11:34:53Z</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2018-02-05T16:41:56Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=c0248c96631f38f02d58762fc018e316843acac8'/>
<id>urn:sha1:c0248c96631f38f02d58762fc018e316843acac8</id>
<content type='text'>
Now that we have no platforms passing platform data to the arm_pmu code,
we can get rid of the platdata and associated hooks, paving the way for
rework of our IRQ handling.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>bitmap: replace bitmap_{from,to}_u32array</title>
<updated>2018-02-07T02:32:44Z</updated>
<author>
<name>Yury Norov</name>
<email>ynorov@caviumnetworks.com</email>
</author>
<published>2018-02-06T23:38:06Z</published>
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<id>urn:sha1:3aa56885e51683a19c8aa71739fd279b3f501cd7</id>
<content type='text'>
with bitmap_{from,to}_arr32 over the kernel. Additionally to it:
* __check_eq_bitmap() now takes single nbits argument.
* __check_eq_u32_array is not used in new test but may be used in
  future. So I don't remove it here, but annotate as __used.

Tested on arm64 and 32-bit BE mips.

[arnd@arndb.de: perf: arm_dsu_pmu: convert to bitmap_from_arr32]
  Link: http://lkml.kernel.org/r/20180201172508.5739-2-ynorov@caviumnetworks.com
[ynorov@caviumnetworks.com: fix net/core/ethtool.c]
  Link: http://lkml.kernel.org/r/20180205071747.4ekxtsbgxkj5b2fz@yury-thinkpad
Link: http://lkml.kernel.org/r/20171228150019.27953-2-ynorov@caviumnetworks.com
Signed-off-by: Yury Norov &lt;ynorov@caviumnetworks.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Ben Hutchings &lt;ben@decadent.org.uk&gt;
Cc: David Decotigny &lt;decot@googlers.com&gt;,
Cc: David S. Miller &lt;davem@davemloft.net&gt;,
Cc: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Cc: Matthew Wilcox &lt;mawilcox@microsoft.com&gt;
Cc: Rasmus Villemoes &lt;linux@rasmusvillemoes.dk&gt;
Cc: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>perf: dsu: Use signed field for dsu_pmu-&gt;num_counters</title>
<updated>2018-01-15T18:02:17Z</updated>
<author>
<name>Suzuki K Poulose</name>
<email>Suzuki.Poulose@arm.com</email>
</author>
<published>2018-01-15T10:51:16Z</published>
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<id>urn:sha1:a22fde8e979494f326e88ef0728367e009260d75</id>
<content type='text'>
We set dsu_pmu-&gt;num_counters to -1, when the DSU is allocated
but not initialised when none of the CPUs are active in the DSU.
However, we use an unsigned field for num_counters. Switch this
to a signed field.

Fixes: 7520fa99246d ("perf: ARM DynamIQ Shared Unit PMU support")
Reported-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
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