user/sven/linux.git/drivers/phy/Makefile, branch v5.15.57

phy: phy-can-transceiver: Add support for generic CAN transceiver driver

2021-06-14T05:50:17Z

The driver adds support for generic CAN transceivers. Currently the modes supported by this driver are standby and normal modes for TI TCAN1042 and TCAN1043 CAN transceivers. The transceiver is modelled as a phy with pins controlled by gpios, to put the transceiver in various device functional modes. It also gets the phy attribute max_link_rate for the usage of CAN drivers. Signed-off-by: Aswath Govindraju Acked-by: Marc Kleine-Budde Link: https://lore.kernel.org/r/20210510051006.11393-4-a-govindraju@ti.com Signed-off-by: Vinod Koul

phy: Add Sparx5 ethernet serdes PHY driver

2021-03-17T06:43:19Z

Add the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25G interfaces available in the Sparx5 SoC. Signed-off-by: Bjarni Jonasson Signed-off-by: Steen Hegelund Reviewed-by: Andrew Lunn Reviewed-by: Alexandre Belloni Link: https://lore.kernel.org/r/20210218161451.3489955-4-steen.hegelund@microchip.com Signed-off-by: Vinod Koul

PHY: Ingenic: Add USB PHY driver using generic PHY framework.

2020-12-05T08:09:30Z

Used the generic PHY framework API to create the PHY, this driver supoorts USB OTG PHY used in JZ4770 SoC, JZ4775 SoC, JZ4780 SoC, X1000 SoC, X1830 SoC and X2000 SoC. Co-developed-by: 漆鹏振 (Qi Pengzhen) Signed-off-by: 漆鹏振 (Qi Pengzhen) Signed-off-by: 周琰杰 (Zhou Yanjie) Tested-by: 周正 (Zhou Zheng) Tested-by: H. Nikolaus Schaller Reviewed-by: Paul Cercueil Link: https://lore.kernel.org/r/20201116141906.11758-4-zhouyanjie@wanyeetech.com Signed-off-by: Vinod Koul

phy: Add USB3 PHY support for Intel LGM SoC

2020-09-11T11:42:49Z

Add support for USB PHY on Intel LGM SoC. Signed-off-by: Ramuthevar Vadivel Murugan Reviewed-by: Philipp Zabel Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.com Signed-off-by: Vinod Koul

phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit Transceiver

2020-06-29T13:18:00Z

Xilinx ZynqMP SoCs have a Gigabit Transceiver with four lanes. All the high speed peripherals such as USB, SATA, PCIE, Display Port and Ethernet SGMII can rely on any of the four GT lanes for PHY layer. This patch adds driver for that ZynqMP GT core. Signed-off-by: Anurag Kumar Vulisha Signed-off-by: Laurent Pinchart Link: https://lore.kernel.org/r/20200629120054.29338-3-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul

phy: Remove CONFIG_ARCH_* check for related subdir in Makefile

2020-06-24T12:59:22Z

If CONFIG_ARCH_ROCKCHIP is not set but COMPILE_TEST is set, the file in the subdir rockchip can not be built due to CONFIG_ARCH_ROCKCHIP check in drivers/phy/Makefile. Since the related configs in drivers/phy/rockchip/Kconfig depend on ARCH_ROCKCHIP, so remove CONFIG_ARCH_ROCKCHIP check for subdir rockchip in drivers/phy/Makefile. The other CONFIG_ARCH_* about allwinner, amlogic, mediatek, renesas and tegra have the same situation, so remove them too. Signed-off-by: Tiezhu Yang Reviewed-by: Heiko Stuebner Link: https://lore.kernel.org/r/1590412138-13903-2-git-send-email-yangtiezhu@loongson.cn Signed-off-by: Vinod Koul

phy: intel-lgm-emmc: Add support for eMMC PHY

2020-01-14T05:20:19Z

Add support for eMMC PHY on Intel's Lightning Mountain SoC. Signed-off-by: Ramuthevar Vadivel Murugan Reviewed-by: Andy Shevchenko Signed-off-by: Kishon Vijay Abraham I

phy: enable compile-testing for the Lantiq PHY drivers

2019-08-23T04:10:51Z

Unconditionally include the lantiq subdirectory in the phy Makefile. All drivers in there have their dependencies maintained. One of these (optional) dependencies is COMPILE_TEST, however this can only be evaluated when Kconfig scans the lantiq subdirectory. Signed-off-by: Martin Blumenstingl Signed-off-by: Kishon Vijay Abraham I

phy: dphy: Add configuration helpers

2018-12-12T04:31:51Z

The MIPI D-PHY spec defines default values and boundaries for most of the parameters it defines. Introduce helpers to help drivers get meaningful values based on their current parameters, and validate the boundaries of these parameters if needed. Signed-off-by: Maxime Ripard Signed-off-by: Kishon Vijay Abraham I

phy: add driver for Freescale i.MX8MQ USB3 PHY

2018-12-12T04:31:46Z

This is a cleaned up port of the downstream i.MX8MQ USB3 PHY driver. Signed-off-by: Li Jun Signed-off-by: Lucas Stach Signed-off-by: Kishon Vijay Abraham I