<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/phy/socionext, branch v5.16.4</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.16.4</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v5.16.4'/>
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<updated>2022-01-27T11:02:08Z</updated>
<entry>
<title>phy: uniphier-usb3ss: fix unintended writing zeros to PHY register</title>
<updated>2022-01-27T11:02:08Z</updated>
<author>
<name>Ryuta NAKANISHI</name>
<email>nakanishi.ryuta@socionext.com</email>
</author>
<published>2021-12-22T05:19:29Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=3ba1c03537a2f7aa5268d8c79c521ecbb4b56fe3'/>
<id>urn:sha1:3ba1c03537a2f7aa5268d8c79c521ecbb4b56fe3</id>
<content type='text'>
[ Upstream commit 898c7a9ec81620125f2463714a0f4dea18ad6e54 ]

Similar to commit 4a90bbb478db ("phy: uniphier-pcie: Fix updating phy
parameters"), in function uniphier_u3ssphy_set_param(), unintentionally
write zeros to other fields when writing PHY registers.

Fixes: 5ab43d0f8697 ("phy: socionext: add USB3 PHY driver for UniPhier SoC")
Signed-off-by: Ryuta NAKANISHI &lt;nakanishi.ryuta@socionext.com&gt;
Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1640150369-4134-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-pcie: Fix updating phy parameters</title>
<updated>2021-06-21T06:33:05Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2021-06-07T03:50:42Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=4a90bbb478dbf18ecdec9dcf8eb708e319d24264'/>
<id>urn:sha1:4a90bbb478dbf18ecdec9dcf8eb708e319d24264</id>
<content type='text'>
The current driver uses a value from register TEST_O as the original
value for register TEST_I, though, the value is overwritten by "param",
so there is a bug that the original value isn't no longer used.

The value of TEST_O[7:0] should be masked with "mask", replaced with
"param", and placed in the bitfield TESTI_DAT_MASK as new TEST_I value.

Fixes: c6d9b1324159 ("phy: socionext: add PCIe PHY driver support")
Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1623037842-19363-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: socionext: Add UniPhier AHCI PHY driver support</title>
<updated>2020-08-31T11:37:53Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-08-25T10:41:11Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=a1bf1c60b55537382e6857bae8aa89d0dd584747'/>
<id>urn:sha1:a1bf1c60b55537382e6857bae8aa89d0dd584747</id>
<content type='text'>
Add a driver for PHY interface built into ahci controller implemented
in UniPhier SoCs. This supports PXs2 and PXs3 SoCs.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1598352071-26675-3-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-pcie: Add SoC-dependent phy-mode function support</title>
<updated>2020-03-20T14:04:29Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-01-30T06:52:45Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=6861781a807aae5fbabf95bd396e1c20f05cf4fb'/>
<id>urn:sha1:6861781a807aae5fbabf95bd396e1c20f05cf4fb</id>
<content type='text'>
Since this phy is shared by multiple devices including USB and PCIe,
it is necessary to determine which device use this phy.
This patch adds SoC-dependent functions to determine a device using
this phy.

When there is 'socionext,syscon' property in the pcie-phy node,
the driver calls SoC-dependt function instead of checking .has_syscon
in SoC-dependent data. The function configures the system controller
to use phy for PCIe.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-pcie: Add legacy SoC support for Pro5</title>
<updated>2020-03-20T14:04:29Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-01-30T06:52:44Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=04de8fa202e6d5fbb07aecbb45daaeec8594664e'/>
<id>urn:sha1:04de8fa202e6d5fbb07aecbb45daaeec8594664e</id>
<content type='text'>
Add legacy SoC support that needs to manage gio clock and reset and to skip
setting unimplemented phy parameters. This supports Pro5.

This specifies only 1 port use because Pro5 doesn't set it in the power-on
sequence.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-usb3hs: Change Rx sync mode to avoid communication failure</title>
<updated>2020-03-20T14:04:29Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-01-30T06:52:43Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=25858c5213d2d69b568bf28b960a3b999ebc3ea9'/>
<id>urn:sha1:25858c5213d2d69b568bf28b960a3b999ebc3ea9</id>
<content type='text'>
In case of using default parameters, communication failure might occur
in rare cases. This sets Rx sync mode parameter to avoid the issue.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-usb3hs: Add legacy SoC support for Pro5</title>
<updated>2020-03-20T14:04:29Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-01-30T06:52:42Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=e68c2a8a2f45cbe4a237b874f87ec14ae2dfa84c'/>
<id>urn:sha1:e68c2a8a2f45cbe4a237b874f87ec14ae2dfa84c</id>
<content type='text'>
Add legacy SoC support that needs to manage gio clock and reset.
This supports Pro5.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-usb3ss: Add Pro5 support</title>
<updated>2020-03-20T14:04:29Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-01-30T06:52:41Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=9376fa634afc207a3ce99e0957e04948c34d6510'/>
<id>urn:sha1:9376fa634afc207a3ce99e0957e04948c34d6510</id>
<content type='text'>
Pro5 SoC has same scheme of USB3 ss-phy as Pro4, so the data for Pro5 is
equivalent to Pro4.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>phy: socionext: Use devm_platform_ioremap_resource()</title>
<updated>2020-03-20T14:04:29Z</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2020-01-30T06:52:39Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=40d763460614e6b264cf4ef8771d8b70367ecd20'/>
<id>urn:sha1:40d763460614e6b264cf4ef8771d8b70367ecd20</id>
<content type='text'>
Use devm_platform_ioremap_resource() to simplify the code.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>treewide: Add SPDX license identifier - Makefile/Kconfig</title>
<updated>2019-05-21T08:50:46Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-19T12:07:45Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1'/>
<id>urn:sha1:ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1</id>
<content type='text'>
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
