user/sven/linux.git/drivers/phy/tegra, branch v5.4.3

phy: tegra: Add PCIe PIPE2UPHY support

2019-08-13T15:01:15Z

Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module. For each PCIe lane of a controller, there is a P2U unit instantiated at hardware level. This driver provides support for the programming required for each P2U that is going to be used for a PCIe controller. Signed-off-by: Vidya Sagar Signed-off-by: Lorenzo Pieralisi Acked-by: Kishon Vijay Abraham I Acked-by: Thierry Reding

Merge tag 'phy-for-5.2-rc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next

2019-07-01T10:11:43Z

Kishon writes: phy: for 5.2-rc *) Move Tegra124 PLL power supplies to be enabled by xusb-tegra124 *) Move Tegra210 PLL power supplies to be enabled by xusb-tegra210 *) Minor fixes: fix memory leaks at error path and addresses coverity. Signed-off-by: Kishon Vijay Abraham I * tag 'phy-for-5.2-rc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: phy: tegra: xusb: Add Tegra210 PLL power supplies phy: tegra: xusb: Add Tegra124 PLL power supplies dt-bindings: phy: tegra-xusb: List PLL power supplies phy: usb: phy-brcm-usb: Remove sysfs attributes upon driver removal phy: renesas: rcar-gen2: Fix memory leak at error paths phy: qcom-qusb2: fix missing assignment of ret when calling clk_prepare_enable

phy: tegra: xusb: Add Tegra210 PLL power supplies

2019-06-12T10:05:44Z

The Tegra210 SoC has four inputs that consume power in order to supply the PLLs that drive the various USB, PCI and SATA pads. Signed-off-by: Thierry Reding Acked-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Kishon Vijay Abraham I

phy: tegra: xusb: Add Tegra124 PLL power supplies

2019-06-12T10:05:44Z

The Tegra124 SoC has four inputs that consume power in order to supply the PLLs that drive the various USB, PCI and SATA pads. Signed-off-by: Thierry Reding Acked-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Kishon Vijay Abraham I

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288

2019-06-05T15:36:37Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 263 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Alexios Zavras Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de Signed-off-by: Greg Kroah-Hartman

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46Z

Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

phy: tegra: xusb: Add Tegra186 support

2019-04-17T08:42:47Z

Add support for the XUSB pad controller found on Tegra186 SoCs. It is mostly similar to the same IP found on earlier chips, but the number of pads exposed differs, as do the programming sequences. Note that the DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL power supplies of the XUSB pad controller require strict power sequencing and are therefore controlled by the PMIC on Tegra186. Signed-off-by: JC Kuo Signed-off-by: Thierry Reding [dan.carpenter@oracle.com: Fix testing the wrong variable in probe()] Signed-off-by: Dan Carpenter [yuehaibing@huawei.com: Make two functions static to fix sparse warning] Signed-off-by: YueHaibing Signed-off-by: Kishon Vijay Abraham I

phy: tegra: xusb: Add support for power supplies

2019-04-17T08:42:45Z

Support enabling various supplies needed to provide power to the PLLs and logic used to drive the USB, PCI and SATA pads. Reviewed-by: JC Kuo Signed-off-by: Thierry Reding Signed-off-by: Kishon Vijay Abraham I

phy: tegra: xusb: Parse dual-role mode property

2019-04-17T08:42:43Z

The device tree bindings document the "mode" property of "ports" subnodes, but the driver was not parsing the property. In preparation for adding role switching, parse the property at probe time. Based on work by JC Kuo . Reviewed-by: JC Kuo Signed-off-by: Thierry Reding Signed-off-by: Kishon Vijay Abraham I

phy: tegra: xusb: Skip single function lane programming

2019-04-17T08:42:43Z

Tegra186 USB2 pads and USB3 pads do not have hardware mux for changing the pad function. For such "lanes", we can skip the lane mux register programming. Signed-off-by: JC Kuo Signed-off-by: Thierry Reding Signed-off-by: Kishon Vijay Abraham I