user/sven/linux.git/drivers/pinctrl/microchip/Makefile, branch masterLinux Kernel
https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=master2026-01-21T12:13:37Zpinctrl: add polarfire soc mssio pinctrl driver2026-01-21T12:13:37ZConor Dooleyconor.dooley@microchip.com2026-01-20T18:15:42Zurn:sha1:488d704ed7b7e7afeef24ee846c8223b607357b7
On Polarfire SoC, the Bank 2 and Bank 4 IOs connected to the
Multiprocessor Subsystem (MSS) are controlled by IOMUX_CRs 1 through 6,
which determine what function in routed to them, and
MSSIO_BANK#_IO_CFG_CRs, which determine the configuration of each pin.
Add a driver for this pin controller, including several custom
properties that reflect aspects of the MSS's configuration.
Reuse the Kconfig option for iomux0, since controlling MSSIOs without
iomux0 routing a function to the MSSIOs in question is pointless, and
routing a function to the MSSIOs is equally unhelpful if none of them
are configured to make use of that function.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
pinctrl: move microchip riscv pinctrl drivers to a folder2026-01-21T12:13:37ZConor Dooleyconor.dooley@microchip.com2026-01-20T18:15:39Zurn:sha1:95c1762aaf34b0d5d128f5c14a82826499c563a3
There's three of these drivers now for the same platforms, move them
together with other microchip drivers to follow.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>