user/sven/linux.git/drivers/sh, branch v2.6.33

sh: pfc: Fixup type mismatch in debug printks.

2009-12-09T06:51:27Z

!!value works out to an int while we were still using %ld, so fix this up and shut gcc up. Signed-off-by: Paul Mundt

sh: intc: Fixup compile breakage.

2009-12-09T05:36:16Z

The resume from hibernation patch introduced build failure, fix it up.. Signed-off-by: Paul Mundt

sh: intc: Fixed resume from hibernation

2009-12-09T03:35:18Z

This patch fixes the resume from hibernation in the intc sysdev device when it manages 'redirect' irq Signed-off-by: Francesco Virlinzi Signed-off-by: Paul Mundt

sh: pfc: pr_info() -> pr_debug() cleanups.

2009-11-30T03:15:04Z

For some reason this was using pr_info() nested under an ifdef DEBUG. While this is appealing in that it circumvents the effort necessary to change ones loglevel, it's not terribly practical. So, convert it over to pr_debug(). Signed-off-by: Paul Mundt

sh: pfc: Convert from ctrl_xxx() to __raw_xxx() I/O routines.

2009-11-30T03:10:41Z

Now that the PFC code is exposed for other architectures, use the common __raw_xxx() routines instead of the ctrl_xxx() ones. This will be needed for ARM-based SH-Mobiles amongst others. Signed-off-by: Paul Mundt

sh: Break out SuperH PFC code

2009-11-30T03:02:53Z

This file breaks out the SuperH PFC code from arch/sh/kernel/gpio.c + arch/sh/include/asm/gpio.h to drivers/sh/pfc.c + include/linux/sh_pfc.h. Similar to the INTC stuff. The non-SuperH specific file location makes it possible to share the code between multiple architectures. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt

sh: intc: Handle legacy IRQ reservation in vector map.

2009-11-02T06:43:20Z

Different CPUs will have different starting vectors, with varying amounts of reserved or unusable vector space prior to the first slot. This introduces a legacy vector reservation system that inserts itself in between the CPU vector map registration and the platform specific IRQ setup. This works fine in practice as the only new vectors that boards need to establish on their own should be dynamically allocated rather than arbitrarily assigned. As a plus, this also makes all of the converted platforms sparseirq ready. Signed-off-by: Paul Mundt

sh: intc: dynamic IRQ support.

2009-11-02T01:30:26Z

This adds support for dynamic IRQ allocation/deallocation for all parts using the SH-style vectored IRQs. While this is not inherently INTC-specific, the INTC code is the main tie-in for vectored IRQ registration, and is the only place that a full view of the utilized vector map is possible. The implementation is fairly straightforward, implementing a flat IRQ map where each registered vector is reserved, allowing us to scan for holes and dynamically wire up IRQs lazily later on in the boot stage. This piggybacks on top of sparseirq in order to make the best use of the available vector space. Dynamic IRQs can be used for any number of things, ranging from MSI in the SH-X3 PCIe case down to demux vectors for board FPGAs and system controllers that presently allocate an arbitrary range. In the latter case, this also allows those platforms to use sparseirq without blowing up, which brings us one step closer to enabling sparseirq as the default for all platform and CPU combinations. Signed-off-by: Paul Mundt

sh: intc: Make ack_regs generally available.

2009-10-27T02:36:43Z

Currently this is ifdef'ed under SH-3 and SH-4A, but there are other CPUs that will need this as well. Given the size of the existing data structures, this doesn't cause any additional cacheline utilization for the existing users, so has no direct impact on the data structures. Signed-off-by: Paul Mundt

sh: maple: PHYSADDR() -> virt_to_phys() conversion.

2009-10-13T03:35:30Z

Maple's abuse of PHYSADDR() likewise can be converted to virt_to_phys() for its cases, although in practice this really wants explicit remapping. Signed-off-by: Paul Mundt