<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/soc/Makefile, branch v6.4.3</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.4.3</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.4.3'/>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/'/>
<updated>2023-02-01T16:11:36Z</updated>
<entry>
<title>soc: nuvoton: Add SoC info driver for WPCM450</title>
<updated>2023-02-01T16:11:36Z</updated>
<author>
<name>Jonathan Neuschäfer</name>
<email>j.neuschaefer@gmx.net</email>
</author>
<published>2023-02-01T05:17:17Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=7dbb4a38bff3449317abec5e0187ad97f699d5a6'/>
<id>urn:sha1:7dbb4a38bff3449317abec5e0187ad97f699d5a6</id>
<content type='text'>
Add a SoC information driver for Nuvoton WPCM450 SoCs. It provides
information such as the SoC revision.

Usage example:

  # grep . /sys/devices/soc0/*
  /sys/devices/soc0/family:Nuvoton NPCM
  /sys/devices/soc0/revision:A3
  /sys/devices/soc0/soc_id:WPCM450

Signed-off-by: Jonathan Neuschäfer &lt;j.neuschaefer@gmx.net&gt;
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Reviewed-by: Paul Menzel &lt;pmenzel@molgen.mpg.de&gt;
Link: https://lore.kernel.org/r/20221031223926.241641-1-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
Link: https://lore.kernel.org/r/20230201051717.1005938-1-joel@jms.id.au
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge patch series "JH7110 PMU Support"</title>
<updated>2023-01-20T21:57:00Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-01-20T21:57:00Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=f3460326e38d6a084fb5b3348125a802567a3690'/>
<id>urn:sha1:f3460326e38d6a084fb5b3348125a802567a3690</id>
<content type='text'>
Walker Chen &lt;walker.chen@starfivetech.com&gt; says:

Add the PMU (Power Management Unit) controller driver for the
StarFive JH7110 SoC. In order to meet low power requirements, PMU is
designed for including multiple PM domains that can be used for power
gating of selected IP blocks for power saving by reduced leakage
current.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>soc: starfive: Add StarFive JH71XX pmu driver</title>
<updated>2023-01-20T21:55:59Z</updated>
<author>
<name>Walker Chen</name>
<email>walker.chen@starfivetech.com</email>
</author>
<published>2023-01-19T09:44:47Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=08b9a94e8654d402bfd1f5496b077503d69aa2cf'/>
<id>urn:sha1:08b9a94e8654d402bfd1f5496b077503d69aa2cf</id>
<content type='text'>
Add pmu driver for the StarFive JH71XX SoC.

As the power domains provider, the Power Management Unit (PMU) is
designed for including multiple PM domains that can be used for power
gating of selected IP blocks for power saving by reduced leakage
current. It accepts software encourage command to switch the power mode
of SoC.

Signed-off-by: Walker Chen &lt;walker.chen@starfivetech.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>soc: sifive: ccache: Add StarFive JH7110 support</title>
<updated>2022-12-26T22:50:15Z</updated>
<author>
<name>Emil Renner Berthing</name>
<email>kernel@esmil.dk</email>
</author>
<published>2022-12-20T01:12:45Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=6635e91648ce0868481fd6dd591d5ac796d8a635'/>
<id>urn:sha1:6635e91648ce0868481fd6dd591d5ac796d8a635</id>
<content type='text'>
This adds support for the StarFive JH7110 SoC which also
features this SiFive cache controller.

Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>soc: loongson: add GUTS driver for loongson-2 platforms</title>
<updated>2022-11-14T15:01:32Z</updated>
<author>
<name>Yinbo Zhu</name>
<email>zhuyinbo@loongson.cn</email>
</author>
<published>2022-11-11T05:42:00Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=b82621ac8450d0de7570506c59f298dbf99ded64'/>
<id>urn:sha1:b82621ac8450d0de7570506c59f298dbf99ded64</id>
<content type='text'>
The global utilities block controls PCIE device enabling, alternate
function selection for multiplexed signals, consistency of HDA, USB
and PCIE, configuration of memory controller, rtc controller, lio
controller, and clock control.

This patch adds a driver to manage and access global utilities block
for LoongArch architecture Loongson-2 SoCs. Initially only reading SVR
and registering soc device are supported. Other guts accesses, such
as reading firmware configuration by default, should eventually be
added into this driver as well.

Signed-off-by: Yinbo Zhu &lt;zhuyinbo@loongson.cn&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>soc: fujitsu: Add A64FX diagnostic interrupt driver</title>
<updated>2022-07-18T11:37:08Z</updated>
<author>
<name>Hitomi Hasegawa</name>
<email>hasegawa-hitomi@fujitsu.com</email>
</author>
<published>2022-05-20T07:41:19Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=64f89dfaa4f155e3797191286aac6e60f404725f'/>
<id>urn:sha1:64f89dfaa4f155e3797191286aac6e60f404725f</id>
<content type='text'>
Register the NMI/IRQ corresponding to the A64FX's device definition
dedicated to diagnostic interrupts, so that when this interrupt is
sent using the BMC, it causes a panic. This can be used to obtain
a kernel dump.

Signed-off-by: Hitomi Hasegawa &lt;hasegawa-hitomi@fujitsu.com&gt;
Link: https://lore.kernel.org/r/20220520074119.3574753-2-hasegawa-hitomi@fujitsu.com'
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2022-06-02T22:23:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-06-02T22:23:54Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=96479c09803b21d195c95fd4b145cd3a5a591ba0'/>
<id>urn:sha1:96479c09803b21d195c95fd4b145cd3a5a591ba0</id>
<content type='text'>
Pull more ARM multiplatform updates from Arnd Bergmann:
 "The second part of the multiplatform changes now converts the
  Intel/Marvell PXA platform along with the rest. The patches went
  through several rebases before the merge window as bugs were found, so
  they remained separate.

  This has to touch a lot of drivers, in particular the touchscreen,
  pcmcia, sound and clk bits, to detach the driver files from the
  platform and board specific header files"

* tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits)
  ARM: pxa/mmp: remove traces of plat-pxa
  ARM: pxa: convert to multiplatform
  ARM: pxa/sa1100: move I/O space to PCI_IOBASE
  ARM: pxa: remove support for MTD_XIP
  ARM: pxa: move mach/*.h to mach-pxa/
  ARM: PXA: fix multi-cpu build of xsc3
  ARM: pxa: move plat-pxa to drivers/soc/
  ARM: mmp: rename pxa_register_device
  ARM: mmp: remove tavorevb board support
  ARM: pxa: remove unused mach/bitfield.h
  ARM: pxa: move clk register definitions to driver
  ARM: pxa: move smemc register access from clk to platform
  cpufreq: pxa3: move clk register access to clk driver
  ARM: pxa: remove get_clk_frequency_khz()
  ARM: pxa: pcmcia: move smemc configuration back to arch
  ASoC: pxa: i2s: use normal MMIO accessors
  ASoC: pxa: ac97: use normal MMIO accessors
  ASoC: pxa: use pdev resource for FIFO regs
  Input: wm97xx - get rid of irq_enable method in wm97xx_mach_ops
  Input: wm97xx - switch to using threaded IRQ
  ...
</content>
</entry>
<entry>
<title>Merge tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers</title>
<updated>2022-05-13T09:33:41Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2022-05-13T09:33:40Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=d4a3b442335b0a9476248c5d6dc07f6f8580a9ca'/>
<id>urn:sha1:d4a3b442335b0a9476248c5d6dc07f6f8580a9ca</id>
<content type='text'>
Powerdomain fixes and improvements, some GRF compatible properties
and a rk3566 GRF clocksource default setup.

* tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: Fix compile-testing SoC drivers
  soc: rockchip: power-domain: Replace dsb() with smb()
  soc: rockchip: Clean up Kconfig whitespace
  soc: rockchip: set dwc3 clock for rk3566
  dt-bindings: soc: rockchip: add rk3566-pipe-grf compatible
  soc: rockchip: pm_domains: Fix typo in comment
  dt-bindings: soc: rockchip: add naneng combo phy register compatible

Link: https://lore.kernel.org/r/3998951.tdWV9SEqCh@phil
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: pxa: move plat-pxa to drivers/soc/</title>
<updated>2022-05-07T20:56:16Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-09-20T11:33:40Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=64dbc4dd7a7cc6642c522963a6194b62480e2a68'/>
<id>urn:sha1:64dbc4dd7a7cc6642c522963a6194b62480e2a68</id>
<content type='text'>
There are two drivers in arch/arm/plat-pxa: mfp and ssp. Both
of them should ideally not be needed at all, as there are
proper subsystems to replace them.

OTOH, they are self-contained and can simply be normal
SoC drivers, so move them over there to eliminate one more
of the plat-* directories.

Acked-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt; (mach-pxa)
Acked-by: Lubomir Rintel &lt;lkundrak@v3.sk&gt; (mach-mmp)
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>soc: apple: Always include Makefile</title>
<updated>2022-05-01T14:55:05Z</updated>
<author>
<name>Sven Peter</name>
<email>sven@svenpeter.dev</email>
</author>
<published>2022-05-01T14:55:05Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=cbb0f00131e48f38db9eda67e0f731504404567b'/>
<id>urn:sha1:cbb0f00131e48f38db9eda67e0f731504404567b</id>
<content type='text'>
We want to allow the code inside drivers/soc/apple to be compiled with
COMPILE_TEST but this will currently result in linking errors because
ARCH_APPLE is not set and make will never recurse into
drivers/soc/apple.
Let's just unconditionally recurse into apple/ since all drivers
in there are guarded by config options anyways.

Signed-off-by: Sven Peter &lt;sven@svenpeter.dev&gt;
</content>
</entry>
</feed>
