<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/tty/serial/Makefile, branch v6.7.2</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v6.7.2</id>
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<updated>2023-10-16T18:18:15Z</updated>
<entry>
<title>drivers/tty/serial: add ESP32S3 ACM gadget driver</title>
<updated>2023-10-16T18:18:15Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2023-10-10T08:59:26Z</published>
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<id>urn:sha1:b0c9a045e8c7d4791ef8bafae2c29fe00e835067</id>
<content type='text'>
Add driver for the ACM gadget controller of the Espressif ESP32S3 SoC.
Hardware specification is available at the following URL:

  https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
  (Chapter 33 USB Serial/JTAG Controller)

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Link: https://lore.kernel.org/r/20231010085926.1021667-6-jcmvbkbc@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drivers/tty/serial: add driver for the ESP32 UART</title>
<updated>2023-10-16T18:17:29Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2023-10-10T08:59:24Z</published>
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<id>urn:sha1:8cc89a229aac8183ffd4c385de0b6b9543175eff</id>
<content type='text'>
Add driver for the UART controllers of the Espressif ESP32 and ESP32S3
SoCs. Hardware specification is available at the following URLs:

  https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf
  (Chapter 13 UART Controller)
  https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
  (Chapter 26 UART Controller)

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Link: https://lore.kernel.org/r/20231010085926.1021667-4-jcmvbkbc@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty/serial: Sort drivers in makefile</title>
<updated>2023-09-18T09:14:43Z</updated>
<author>
<name>Ilpo Järvinen</name>
<email>ilpo.jarvinen@linux.intel.com</email>
</author>
<published>2023-09-12T10:35:57Z</published>
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<id>urn:sha1:3b609120821c551f72522d4378bf606825b095bd</id>
<content type='text'>
Sort drivers in alphabetic order in Makefile to make it easier to find
the correct line. In case the CONFIG and filenames disagree, sort using
the filename (but ignoring "serial" prefixes).

Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230912103558.20123-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: cpm_uart: Remove cpm_uart/ subdirectory</title>
<updated>2023-08-04T13:08:30Z</updated>
<author>
<name>Christophe Leroy</name>
<email>christophe.leroy@csgroup.eu</email>
</author>
<published>2023-08-03T13:56:50Z</published>
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<id>urn:sha1:dbae4258d156e1c698bdd6deb56e13aa4d4e55cc</id>
<content type='text'>
cpm_uart/ subdirectory only has cpm_uart_core.c and cpm_uart.h now.

Move them up and remove cpm_uart/ directory while renaming
cpm_uart_core.c as cpm_uart.c

Signed-off-by: Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;
Link: https://lore.kernel.org/r/9b8b8f89fc386480030f5339abe307541ae436a6.1691068700.git.christophe.leroy@csgroup.eu
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>tty: serial: Add Nuvoton ma35d1 serial driver support</title>
<updated>2023-06-19T13:42:26Z</updated>
<author>
<name>Jacky Huang</name>
<email>ychuang3@nuvoton.com</email>
</author>
<published>2023-06-19T03:23:29Z</published>
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<id>urn:sha1:930cbf92db0184e327293d5e7089be0b08d46371</id>
<content type='text'>
This adds UART and console driver for Nuvoton ma35d1 Soc.
It supports full-duplex communication, FIFO control, and
hardware flow control.
Command line set "console=ttyNVT0,115200", NVT means
Nuvoton MA35 UART port. The UART driver probe will
create path named "/dev/ttyNVTx".

Signed-off-by: Jacky Huang &lt;ychuang3@nuvoton.com&gt;
Reviewed-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230619032330.233796-2-ychuang570808@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: core: Start managing serial controllers to enable runtime PM</title>
<updated>2023-05-31T09:46:59Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2023-05-25T11:30:30Z</published>
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<id>urn:sha1:84a9582fd203063cd4d301204971ff2cd8327f1a</id>
<content type='text'>
We want to enable runtime PM for serial port device drivers in a generic
way. To do this, we want to have the serial core layer manage the
registered physical serial controller devices.

To manage serial controllers, let's set up a struct bus and struct device
for the serial core controller as suggested by Greg and Jiri. The serial
core controller devices are children of the physical serial port device.
The serial core controller device is needed to support multiple different
kind of ports connected to single physical serial port device.

Let's also set up a struct device for the serial core port. The serial
core port instances are children of the serial core controller device.

With the serial core port device we can now flush pending TX on the
runtime PM resume as suggested by Johan.

Suggested-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Suggested-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Suggested-by: Jiri Slaby &lt;jirislaby@kernel.org&gt;
Suggested-by: Johan Hovold &lt;johan@kernel.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230525113034.46880-1-tony@atomide.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: 8250: RT288x/Au1xxx code away from core</title>
<updated>2023-05-13T10:47:26Z</updated>
<author>
<name>Ilpo Järvinen</name>
<email>ilpo.jarvinen@linux.intel.com</email>
</author>
<published>2023-05-11T12:10:27Z</published>
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<id>urn:sha1:b334214ea08d941af376fec853621d856b12bc81</id>
<content type='text'>
A non-trivial amount of RT288x/Au1xxx code is encapsulated into
ifdeffery in 8250_port / 8250_early and some if UPIO_AU blocks.
Create a separate file from them.

Also handle errors properly in the cases where RT288x/Au1xxx code is
not configured.

It seems that 0x1000 mapsize is likely overkill but I've kept it the
same as previously (the value was shrunk to that value in commit
b2b13cdfd05e ("SERIAL 8250: Fixes for Alchemy UARTs.")). Seemingly, the
driver only needs to access register at 0x28 for the divisor latch.

The Kconfig side is a bit tricky. As SERIAL_8250_RT288X is bool it can
only be =y. It is possible to have SERIAL_8250=m + SERIAL_8250_RT288X=y
which required altering when 8250/ is included or the rt288x would not
be built.

Signed-off-by: Ilpo Järvinen &lt;ilpo.jarvinen@linux.intel.com&gt;
Link: https://lore.kernel.org/r/20230511121029.13128-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: Rename earlycon semihost driver</title>
<updated>2023-01-19T13:58:19Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng@tinylab.org</email>
</author>
<published>2022-12-09T15:04:37Z</published>
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<id>urn:sha1:359fb3f870465cc3b9a77728d09e033a248b40b6</id>
<content type='text'>
Now that earlycon semihost driver works on RISC-V too, let's use a
much more generic name for the driver.

Signed-off-by: Bin Meng &lt;bmeng@tinylab.org&gt;
Tested-by: Sergey Matyukevich &lt;sergey.matyukevich@syntacore.com&gt;
Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20221209150437.795918-4-bmeng@tinylab.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: remove VR41XX serial driver</title>
<updated>2022-07-16T06:16:01Z</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tsbogend@alpha.franken.de</email>
</author>
<published>2022-07-15T14:03:22Z</published>
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<id>urn:sha1:ceefa81e6e69b020997205e5c30a42d43aa5ae63</id>
<content type='text'>
Commit d3164e2f3b0a ("MIPS: Remove VR41xx support") removed support
for MIPS VR41xx platform, so remove exclusive drivers for this
platform, too.

Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Link: https://lore.kernel.org/r/20220715140322.135825-1-tsbogend@alpha.franken.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sunplus-uart: Add Sunplus SoC UART Driver</title>
<updated>2022-02-26T09:03:21Z</updated>
<author>
<name>Hammer Hsieh</name>
<email>hammerh0314@gmail.com</email>
</author>
<published>2022-02-22T09:36:03Z</published>
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<id>urn:sha1:9e8d5470325f25bed7d33f9faaae6d5e4f313650</id>
<content type='text'>
Add Sunplus SoC UART Driver.
SP7021 UART block contains 5 UARTs.
There are UART0~4 that supported in SP7021, the features list as below.
Support Full-duplex communication.
Support data packet length configurable.
Support stop bit number configurable.
Support force break condition.
Support baud rate configurable.
Support error detection and report.
Support RXD Noise Rejection Vote configurable.

UART0 pinout only support TX/RX two pins.
UART1 to UART4 pinout support TX/RX/CTS/RTS four pins.
Normally UART0 used for kernel console, also can be used for normal uart.
Command line set "console=ttySUP0,115200", SUP means Sunplus Uart Port.
UART driver probe will create path named "/dev/ttySUPx".

https://sunplus.atlassian.net/wiki/spaces/doc/pages/1873412290/13.+Universal+Asynchronous+Receiver+Transmitter+UART

Signed-off-by: Hammer Hsieh &lt;hammerh0314@gmail.com&gt;
Link: https://lore.kernel.org/r/1645522563-17183-3-git-send-email-hammerh0314@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
