<feed xmlns='http://www.w3.org/2005/Atom'>
<title>user/sven/linux.git/drivers/tty/serial/sh-sci.h, branch v4.9.261</title>
<subtitle>Linux Kernel
</subtitle>
<id>https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.9.261</id>
<link rel='self' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/atom?h=v4.9.261'/>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/'/>
<updated>2016-06-25T16:09:53Z</updated>
<entry>
<title>serial: sh-sci: Clear (H)SCIF timeout and overrun during reset</title>
<updated>2016-06-25T16:09:53Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-24T14:59:16Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=fc2af3348a4acea0c28db89a8c84660d0baed4aa'/>
<id>urn:sha1:fc2af3348a4acea0c28db89a8c84660d0baed4aa</id>
<content type='text'>
Add the missing timeout bit definition for (H)SCIF.
Clear the timeout and overrun flag bits during UART reset, cfr. the
initialization flowchart in the datasheet.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Add more Serial Port Control/Data Register documentation</title>
<updated>2016-06-25T16:07:51Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-03T10:00:07Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=4780c09f7a0926674c96c0a40dfeb7469f759c8e'/>
<id>urn:sha1:4780c09f7a0926674c96c0a40dfeb7469f759c8e</id>
<content type='text'>
Improve documentation for the SCIFA/SCIFB Serial Port Control and Data
Registers:
  - State clearly that the RTS and CTS lines are active-low,
  - Document the bits related to the serial port's SCK, RXD, and TXD
    pins.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Add more Serial Port Register documentation</title>
<updated>2016-06-25T16:07:51Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-06-03T10:00:06Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=ef5e90e8ccb7b715c0a1509339f730b2bf9698a2'/>
<id>urn:sha1:ef5e90e8ccb7b715c0a1509339f730b2bf9698a2</id>
<content type='text'>
Improve documentation for the (H)SCIF Serial Port Register:
  - Make it clear the RTS and CTS lines are active-low,
  - Document the bits related to the serial port's clock pin.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Peter Hurley &lt;peter@hurleysoftware.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Add more Serial Mode Register documentation</title>
<updated>2016-02-07T06:54:55Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2016-01-04T13:45:18Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=95ee05c7adb0b5b7d55cc991b015a62efba21ba5'/>
<id>urn:sha1:95ee05c7adb0b5b7d55cc991b015a62efba21ba5</id>
<content type='text'>
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Add BRG register definitions</title>
<updated>2015-12-17T10:18:44Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-11-12T12:36:06Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=b8bbd6b2923279f1c9c74d59638b38a1eace78e8'/>
<id>urn:sha1:b8bbd6b2923279f1c9c74d59638b38a1eace78e8</id>
<content type='text'>
Add register definitions for the Baud Rate Generator for External Clock
(BRG), as found in some SCIF and in HSCIF, including a new regtype for
the "SH-4(A)"-derived SCIF variant with BRG.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Correct SCIF_ERROR_CLEAR for plain SCIF</title>
<updated>2015-10-04T16:33:48Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-08-21T18:02:27Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=5da0f468745bc2dd992f49511bae5183efadfa05'/>
<id>urn:sha1:5da0f468745bc2dd992f49511bae5183efadfa05</id>
<content type='text'>
SCIF_ERROR_CLEAR includes SCIFA_ORER, which exists only on SCIFA/SCIFB
and SCIF on sh7705/sh7720/sh7721.

To fix this:
  1. Remove SCIFA_ORER from the definition of SCIF_ERROR_CLEAR,
  2. During initialization, store the error clear mask to use,
     incorporating the overrun bit only if it applies to the SCxSR
     register.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Prevent compiler warnings on 64-bit</title>
<updated>2015-10-04T16:33:48Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-08-21T18:02:26Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=a9efeca613a8fe5281d7c91f5c8c9ea46f2312f6'/>
<id>urn:sha1:a9efeca613a8fe5281d7c91f5c8c9ea46f2312f6</id>
<content type='text'>
Expressions involving "BIT(...)" create values of type "long", which is
64-bit on 64-bit.  Hence "~BIT(...)" no longer fits in 32-bit, which
will cause future compiler warnings when assigning to 32-bit variables:

    drivers/tty/serial/sh-sci.c: In function 'sci_init_single':
    drivers/tty/serial/sh-sci.h:58:25: warning: large integer implicitly truncated to unsigned type [-Woverflow]
     #define SCI_ERROR_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER)
			     ^
    drivers/tty/serial/sh-sci.c:2325:27: note: in expansion of macro 'SCI_ERROR_CLEAR'
       sci_port-&gt;error_clear = SCI_ERROR_CLEAR;

As these values are (at most) 32-bit register values anyway, cast them
to "u32" at the definition level to prevent such compiler warnings.

Reported-by: kbuild test robot &lt;fengguang.wu@intel.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Replace buggy big #ifdef by runtime logic</title>
<updated>2015-10-04T16:33:48Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-08-21T18:02:25Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=a1b5b43ffb84945cbdc5cbdb993d3195c7e77cbb'/>
<id>urn:sha1:a1b5b43ffb84945cbdc5cbdb993d3195c7e77cbb</id>
<content type='text'>
The #ifdef logic to clear SCxSR bits using RMW on SCIFA/SCIFB and SCIF
variants with some SCIFA features (sh7705/SH7720/sh7721) has several
drawbacks:
  - It wasn't updated for newer R-Mobile variants (APE6),
  - It doesn't correctly handle SoCs with both SCIF and SCIFA/B (e.g.
    R-Car Gen2, but also legacy sh7723/sh7724),
  - It doesn't play well with ARM multi-platform kernels: on R-Car Gen2,
    SCIF/SCIFA/SCIFB/HSCIF were handled differently, depending on
    whether r8a7740 or sh73a0 support was enabled or not,

Replace the #ifdef logic by runtime logic to fix this.

SCIFA/SCIFB and SCIF on sh7705/sh7720/sh7721 use RMW to clear error
bits, other variants use plain stores, as before.

Note that this changes behavior for SCIFA on sh7723/sh7724 (these SoCs
have both SCIF and SCIFA), which didn't use RMW before.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Replace hardcoded overrun bit values</title>
<updated>2015-05-10T17:06:39Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-04-30T16:21:31Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=75c249fd7cb9097c58e44bc82f61b1f72ef79b3a'/>
<id>urn:sha1:75c249fd7cb9097c58e44bc82f61b1f72ef79b3a</id>
<content type='text'>
Add the missing overrun bit definition for (H)SCIF.
Replace overrun_bit by overrun_mask, so we can use the existing
defines instead of hardcoded values.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>serial: sh-sci: Replace hardcoded values in SCxSR_*_CLEAR macros</title>
<updated>2015-05-10T17:06:38Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-04-30T16:21:30Z</published>
<link rel='alternate' type='text/html' href='https://git.stealer.net/cgit.cgi/user/sven/linux.git/commit/?id=2922598cd913dc1a3fc0d2e77463075b80ea769f'/>
<id>urn:sha1:2922598cd913dc1a3fc0d2e77463075b80ea769f</id>
<content type='text'>
Add the missing overrun error bit in SCxSR on SCIFA/SCIFB and SCIF on
SH7705/SH7720/SH7721.
Document what the corresponding bit(s) on plain SCIF are used for.
Sort the components of SCIF_DEFAULT_ERROR_MASK by reverse definition
order.

Replace the hardcoded values in the SCxSR_*_CLEAR macros by proper
defines. Use bit masks (negations of sets of bits) to make it more
obvious which bits are being cleared.

Assembler output (on sh) was compared before and after this commit:
  - For the first branch of the big "#if defined(...) || ..." construct,
    the code has changed slightly, as 32-bit bitmasks can be loaded in a
    single instruction, unlike the old large 16-bit constants (the SCxSR
    register is 16 bit, so we don't care about the top 16 bits),
  - For the second branch, the generated code is identical.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
