user/sven/linux.git/drivers/tty/serial, branch v3.2.19

tty: Allow uart_register/unregister/register

2012-05-30T23:43:42Z

commit 1e66cded334e6cea596c72f6f650eec351b1e959 upstream. This is legitimate but because we don't clear the drv->state pointer in the unregister code causes a bogus BUG(). Resolves-bug: https://bugzilla.kernel.org/show_bug.cgi?id=42880 Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ben Hutchings

Add missing call to uart_update_timeout()

2012-05-30T23:43:36Z

commit 8b979f7c6bf13a57e7b6002f1175312a44773960 upstream. This patch fixes a problem reported here: http://article.gmane.org/gmane.linux.ports.arm.kernel/155242/match=auart Signed-off-by: Lothar Waßmann Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ben Hutchings

8250.c: less than 2400 baud fix.

2012-05-30T23:43:34Z

commit f9a9111b540fd67db5dab332f4b83d86c90e27b1 upstream. We noticed that we were loosing data at speed less than 2400 baud. It turned out our (TI16750 compatible) uart with 64 byte outgoing fifo was truncated to 16 byte (bit 5 sets fifo len) when modifying the fcr reg. The input code still fills the buffer with 64 bytes if I remember correctly and thus data is lost. Our fix was to remove whiping of the fcr content and just add the TRIGGER_1 which we want for latency. I can't see why this would not work on less than 2400 always, for all uarts ... Otherwise one would have to make sure the filling of the fifo re-checks the current state of available fifo size (urrk). Signed-off-by: Christian Melki Signed-off-by: Greg Kroah-Hartman [bwh: Backported to 3.2: adjust filename; replace *port with up->port] Signed-off-by: Ben Hutchings

8250_pci: fix pch uart matching

2012-05-30T23:43:32Z

commit aaa10eb1d0034eccc096f583fe308f0921617598 upstream. The rules used to make 8250_pci "ignore" the PCH uarts are lacking pci subids entries, preventing it to match and thus is breaking serial port support for theses systems. This has been tested on a nanoETXexpress-TT, which has a specifici uart clock. Tested-by: Erwan Velu Signed-off-by: Arnaud Patard Signed-off-by: Greg Kroah-Hartman [bwh: Backported to 3.2: adjust filename] Signed-off-by: Ben Hutchings

pch_uart: Fix dma channel unallocated issue

2012-05-11T12:14:00Z

commit af6d17cdc8c89aeb3101f0d27cd32fc0592b40b2 upstream. This driver anticipates pch_uart_verify_port() is not called during installation. However, actually pch_uart_verify_port() is called during installation. As a result, memory access violation occurs like below. 0. initial value: use_dma=0 1. starup() - dma channel is not allocated because use_dma=0 2. pch_uart_verify_port() - Set use_dma=1 3. UART processing acts DMA mode because use_dma=1 - memory access violation occurs! This patch fixes the issue. Solution: Whenever pch_uart_verify_port() is called and then dma channel is not allocated, the channel should be allocated. Signed-off-by: Tomoya MORINAGA Signed-off-by: Greg Kroah-Hartman [bwh: Backported to 3.2: adjust context] Signed-off-by: Ben Hutchings

ARM: clps711x: serial driver hungs are a result of call disable_irq within ISR

2012-05-11T12:13:50Z

commit 7a6fbc9a887193a1e9f8658703881c528040afbc upstream. Since 2.6.30-rc1 clps711x serial driver hungs system. This is a result of call disable_irq from ISR. synchronize_irq waits for end of interrupt and goes to infinite loop. This patch fix this problem. Signed-off-by: Alexander Shiyan Signed-off-by: Greg Kroah-Hartman Signed-off-by: Ben Hutchings

serial: PL011: move interrupt clearing

2012-04-22T22:31:11Z

commit c3d8b76f61586714cdc5f219ba45592a54caaa55 upstream. Commit 360f748b204275229f8398cb2f9f53955db1503b "serial: PL011: clear pending interrupts" attempts to clear interrupts by writing to a yet-unassigned memory address. This fixes the issue. The breaking patch is marked for stable so should be carried along with the other patch. Cc: Shreshtha Kumar Sahu Cc: Russell King Cc: Nicolas Pitre Reported-by: Viresh Kumar Signed-off-by: Linus Walleij Tested-by: Grant Likely Signed-off-by: Greg Kroah-Hartman

serial: PL011: clear pending interrupts

2012-04-22T22:31:11Z

commit 9b96fbacda34079dea0638ee1e92c56286f6114a upstream. Chanho Min reported that when the boot loader transfers control to the kernel, there may be pending interrupts causing the UART to lock up in an eternal loop trying to pick tokens from the FIFO (since the RX interrupt flag indicates there are tokens) while in practice there are no tokens - in fact there is only a pending IRQ flag. This patch address the issue with a combination of two patches suggested by Russell King that clears and mask all interrupts at probe() and clears any pending error and RX interrupts at port startup time. We suspect the spurious interrupts are a side-effect of switching the UART from FIFO to non-FIFO mode. Cc: Shreshtha Kumar Sahu Reported-by: Chanho Min Suggested-by: Russell King Signed-off-by: Linus Walleij Reviewed-by: Jong-Sung Kim Signed-off-by: Greg Kroah-Hartman

pch_uart: Fix MSI setting issue

2012-04-22T22:31:01Z

commit 867c902e07d5677e2a5b54c0435e589513abde48 upstream. The following patch (MSI setting) is not enough. commit e463595fd9c752fa4bf06b47df93ef9ade3c7cf0 Author: Alexander Stein Date: Mon Jul 4 08:58:31 2011 +0200 pch_uart: Add MSI support Signed-off-by: Alexander Stein Signed-off-by: Greg Kroah-Hartman To enable MSI mode, PCI bus-mastering must be enabled. This patch enables the setting. cc: Alexander Stein Signed-off-by: Tomoya MORINAGA Signed-off-by: Greg Kroah-Hartman

tty: serial: altera_uart: Check for NULL platform_data in probe.

2012-04-22T22:31:00Z

commit acede70d6561f2d042d9dbb153d9a3469479c0ed upstream. Follow altera_jtag_uart. This fixes a crash if there is a mistake in the DTS. Signed-off-by: Yuriy Kozlov Signed-off-by: Tobias Klauser Signed-off-by: Greg Kroah-Hartman